RESET Circuitry VCC3. R1 10k PX[39..0] SW1 SKRAALE010. CLOCK Circuitry PC[5..0] PC0. Xin32 Xout32 Xin0 Xout0 PC1 PC2 PC3 PC4. Xin1 PC5.

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1 P[..0] P0 P P P P P P P P P P0 P P P P P P P P P P0 P P P P P P P P P P0 P RESET ircuitry V P[0..0] P[..0] US[..] VUS US R US R V V GN P0 P P P P P P P P P P0 P P P P P P P P P P0 P P P P P P P P P P0 P P P P P P R 0 R U P0 P P P P P P P P P P0 P P P P P P P P P P0 P P P P P P P P P P0 P P P P P P0 VUS M P RESET_n VN VREF GN P0 P P P P P P P P P P0 P P P P P P P P P P0 P P P P P P P P P P0 P VOUT V V V V VSYS VIN VOOST V0 V V V V V GN0 GN GN GN GN GN GN GN GN VMRGIN PX0 PX PX PX 0 PX PX PX PX PX PX PX0 PX 0 PX PX PX PX PX PX PX PX PX0 PX PX PX PX PX PX 0 PX 0 PX 0 PX 0 PX0 0 PX PX PX PX 0 PX PX PX 0 PX PX TK TO 0 TI TMS PX0 PX PX PX PX PX PX PX PX PX PX0 PX PX PX PX PX PX PX PX PX PX0 PX PX PX PX PX PX PX PX PX PX0 PX PX PX PX PX PX PX PX PX JTG0 JTG JTG JTG PX[..0] JTG[..0] P[..0] Xin P0 P P P P P Spare lock X SW SKRLE00 Xin Xout Xin0 Xout0 Xin Xout Xout 00n Xin LOK ircuitry R 0k Xin0 PU Main lock p X Q.0-SMU-0-0/0- p Xout0 RT lock QF0000 X Xout TU0-0ESL 0 0 p p TP Vo R Vcore Vsys R0 Vcore Vboost Vio Vo ecoupling capacitance.v output.u 0p Vcore Vcore Vcore Vcore Vboost.V ore power supply 0.n 0.n 0.n 0.n n n n 0 n 00n 0.u 00n n Vsys V.V PLL power supply 0.n n 0.u 0 00n n GN Vcore.V core power supply n n Vio n Vio Vio TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE.V I/O power supply 00n 00n 00n 00n 0 n 0 n n n.u EVK00 Size ocument Number Rev Processor ate: Thursday, February, 00 Sheet of

2 oard US powered V Regulator Power Switch evice current limiter PJ-00H-SMT J TP MRS0TG TP TESTP uf 0n U VIN SWITH VIN SWITH SWITH ON/OFF N N F N 0 N N GN PGN LMS-.0/NOP 0n L Vin MSS-ML 0 MRS0TG 0 u TP SW VUS Vin MMS T TP VUS_IN V VUS_IN R 0 00n R U IN IN O EN GN OUT OUT OUT V.u TP TP PX[..0] P[..0] PX P Over_urrent_etect V R k Host VUS generation with Overcurrent etection in output R k V R U IN IN O EN TPS00 GN OUT OUT OUT.u VUS 00n V V Regulator U VIN VOUT V TP TESTP urrent consumption test points TP TP V R TP TP Vio R 00n GN LMSTX-. R R 0 EL-UG GRMR0J0K0 u u R R TP0 TP Vcore V intends to provide a clean.v power supply for analog blocks Vio intends to provide a clean.v power supply for TU0 buffers Vcore intends to provide a clean.v power supply for TU0 internal regulator Vboost intends to provide a clean.v power supply for TU0 flash VOOST Vp intends to provide a clean.v power supply for all peripherals R R TP TP TP TP V Vboost GN TP TP GN R0 TP TP TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev Power Supply ate: Thursday, February, 00 Sheet of

3 V TP V R U 0MHzFPS V Output GN N REF_LK V.k R M MIO LELINK LET_LINK V V RX_V RX_ER RX0 RX V V 00n 00n R.k n 0 U PFIN RX_LK RX_V/MII_MOE RS/RS_V/LE_FG RX_ER/MIX_EN OL/PHY0 RX_0/PHY RX_/PHY RX_/PHY RX_/PHY IOGN IOV TX_EN TX0 TX P[..0] GN IOGN X X IOV M MIO 0 RESET LE_LINK/N0 LE_SPEE/N LE_T/OL/N_EN MHz_OUT TX_LK TX_EN TX_0 TX_ TX_ TX_/SNI_MOE PWR_OWN/INT TK TO TMS TRST TI P0 P P P P P P P P P.k R.k R P REF_LK TX_EN RX_ER M MIO RX_V.k R 0 P[0..0] TP PHY Interface RIS PFOUT V RESERVE RESERVE 0 GN PFIN T + T - GN R + R - PI TP TP0 R R R.k V R.k R.k GN GN TP R V V R R V R0 R R R V R R TX0 TX RX0 RX n 00n 00n + 0uF/0V 00n TP TP TP TP V V 00n n GRMR0J0K0 GRMR0J0K0 Shield Shield ETHERNET 0/00 Mbit/s connector J T+ T T- R R+ R 0 T R- R N nf Green R 0 GN R Yellow J0G0NLT TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 ate: Thursday, February, 00 Sheet of LET_LINK LELINK V R 0 Size ocument Number Rev Ethernet

4 P[0..0] P R US_I TP J VUS - + I GN SHIEL SHIEL TP SHIEL TESTP TP SHIEL MUS-0-F--SM- US.0 mini - receptacle TP TP0 TP TP VUS US US TP TP US[..] US_I TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev US ate: Thursday, February, 00 Sheet of

5 V V 00n SPI0_S0 SPI0_SK SPI0_MISO SPI0_MOSI R 00k J SPRE SPI for additional peripheral P[0..0] P[0..0] P0 P P P P P P P P P P P SPI0_S0 SPI0_MISO SPI0_MOSI SPI0_SK R R R TP TP TP TP TP TP SPI_RETET SPI_WRITEPROTETn SPI_S0 SPI_SK SPI_MOSI SPI_MISO SPI_S SPI_S SPI_MISO SPI_S SPI_SK SPI_MOSI V V V V R 00k R 00k R0 00k R 00k J 0 LK M N V V SPI_S0 SPI_MISO SPI_MOSI SPI_SK V R 00k U SI SK RESET S SO GN V WP V R 00k SPI_RETET SPI_WRITEPROTETn S/MM R 00k R 00k V 0 ETET WP SW_OM S000 V VSS VSS VSS 00n TFLSH V 00n EOUPLING PITOR LOSE TO THE EVIE TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev SPI peripherals ate: Thursday, February, 00 Sheet of

6 Pin irection Signal Input ata arrier etect Input RX Received ata Output TX Transmitted ata Output TR ata Terminal Ready Signal Ground Input SR ata Set Ready Output RTS Request To Send Input TS lear To Send Input RI Ring Indicator P[0..0], P[0..0], V P P0 P P R R 00n U0_Tx U0_Rx U0_TS U0_RTS P[0..0], P[..0], P P R0 R P R P R P P R R P R P R U_Rx U_Tx U_RTS U_TS U_ U_SR U_TR U_RI TP U0_Tx U0_TS U0_Rx U0_RTS TP0 00n 00n 0 U Standard URT on USRT TIN TIN ROUT ROUT MXEE+ V+ TP TOUT TOUT RIN RIN TP Please refer to known issue section of the user's guide V GN V- 0 00n 00n TX0 TS0 RX0 RTS0 R R J 0 SM0S TP U_Tx U_RTS U_TR TP U_Rx U_TS U_RI U_ U_SR 00n 00n 0 U TTL/MOS TIN TIN TIN ROUT ROUT ROUT ROUT ROUT ROUT ROUT V V V+ V- SHN R RS- TP TOUT TOUT 0 TOUT RIN RIN RIN RIN RIN Tx RTS TR TP Rx TS RI SR 00n 00n 00n 0k V R R0 R R 0 J SM0S P[0..0], S SL P P0 V TWI Interface J0 V R 0k V R 0k S SL EN GN R 0k MXEEUI+ Please refer to known issue section of the user's guide MOEM URT on USRT TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev USRTs and TWI interfaces ate: Thursday, February, 00 Sheet of

7 Sensors V V R 00k V TEMT000 V P[0..0], P P P 0 Joystick Interface 0n 0 R NPWF0J R PT-0MV R 00k Temperature Photoresistor Potentiometer R TW PT0-0-LK Joy_ EXTINT Joy_ SW SKRHE00 TR OM Shield Shield Joy_ Joy_ P[0..0], V V V V V R 0k P P P0 P P R 0k R0 0k R 0k R 0k Joy_ Joy_ EXTINT Joy_ Joy_ V V V Push buttons R 0k TP R 0k TP R 0k TP USW USW USW SW SKRLE00 00n SW SKRLE00 00n SW SKRLE n PX[..0], PX PX PX USW USW USW V V V EL-UG V V V EL-UG EL-UG EL-UG G R SML-00MLT G R SML-00MLT P[..0], P P P P0 LE0 LE LE LE TESTP TP LE0 R TESTP R TP0 LE TESTP TP LE R TESTP R TP LE R TESTP TP R0 TP TESTP TESTP R TP R TP TESTP P[..0], P P0 P P LE LE LE LE LE LE LE LE TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE icolore Leds on P bus : LE, LE, LE & LE on PWM channels EVK00 Size ocument Number Rev User inputs and outputs ate: Thursday, February, 00 Sheet of

8 V.u 00n n 00n n.u PX[..0], P[..0], PX0 PX PX PX PX PX PX PX PX PX PX0 PX PX PX PX PX0 PX PX PX PX PX PX PX PX PX0 PX PX PX PX PX PX PX PX 0 0 QM Sn 0 QM0 0 S0 QM0 QM SWEn Sn RSn Sn R.k SKE V R.k SK U QML QMH WE S RS S KE LK N SRM Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q VQ VQ VQ VQ V V V VSS VSS VSS VSSQ VSSQ VSSQ VSSQ MTLM 0 0 V 0 0 P0 P P P P P SK SKE RSn Sn SWEn S0 TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev SRM ate: Thursday, February, 00 Sheet of

9 P[..0], P P0 P P P P P P P P0 P MSEO M00 M0 M0 M0 M0 M0 MSEO0 EVTIn EVTO MKO JTG[..0], JTG0 JTG JTG JTG JTG_TK JTG_TO JTG_TI JTG_TMS JTG Interface NEXUS ebug Interface J TP TP TP TP TP TP TP0 TP V R JTG_TO 0k JTG_TK JTG_TMS JTG_TI V V 00n 00n GN GN GN GN GN V EVTIn M0 M0 M0 M0 M0 M00 EVTO MKO MSEO MSEO0 JTG_TK JTG_TO JTG_TMS EVTO JTG_TI J 0 STL-0VTT-0U Pin Header SM,mm V V 00n TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev ebug interfaces ate: Thursday, February, 00 Sheet of

10 Expansion headers J P[..0] P[..0] P[..0] P[..0] P[..0] P0 P P P P P0 P P R0 GN GN P P P0 P P P P P0 P GN J V P P P P P P P P V P P P P P P P P P V P[..0] P[..0] P[..0] P[..0] P[..0] P[0..0] P[0..0] P[0..0] P[0..0] PX[..0] PX[..0] PX[..0] PX[..0] PX[..0] GN P0 P P P P P0 P P P P P0 P P P P P0 GN GN PX0 PX PX PX PX PX0 PX PX PX PX PX0 PX PX PX PX PX0 PX PX PX PX GN V P P P P P P P P P P P P P P P V V PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX PX V P[0..0] P[0..0] P[0..0] P[0..0] PX[..0] PX[..0] PX[..0] PX[..0] PX[..0] TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev Expansion headers ate: Thursday, February, 00 Sheet 0 of

11 lines of array + line of V + line of VSS V 0 J0 E 0 J 0 J E SJ-0 E E 0 J 0 0 J0 0 E E J 0 J E SJ-0 J E0 SJ P J J 0 0 E SJ-0 0 E 0 J 0 J J J E J J 0 J TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev Prototyping area ate: Thursday, February, 00 Sheet of

12 E-IP0- lue white L KS00 controller V R R0 L L Module P[..0] P R L_J V GN SPI_MISO SPI_S SPI_MOSI SPI_SK L_J L_V L_VSS V R 0k L_ L_ 0 N VEE V VSS 0 RS R/W E X 0 haracters L_J TP0 V 00n V R0 W--0_LF RES IP0-e TMEL Nantes S La hantrerie P 00 0 Nantes edex FRNE EVK00 Size ocument Number Rev L ate: Thursday, February, 00 Sheet of

The EFM32 G890 MCU Board is a small plugin module for usage with the EFM32 Gecko Development Kit.

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