UT8RHEEB-288PC RadTol Eclipse FPGA UT6325 Evaluation Board Advanced Data Sheet

Transcription

1 Standard Products UT8RHEEB-288PC RadTol Eclipse FPGA UT6325 Evaluation Board Advanced Data Sheet September FEATURES User configurable evaluation board for the UT6325 RadTol Eclipse FPGA Available with both 280-plastic ball grid array (PBGA) and 288-ceramic quad flatpack (CQFP) sockets Ideal for rapid evaluation of the UT6325 RadTol Eclipse FPGA functionality, DC and AC performance Includes full access to every I/O on the UT6325 RadTol Eclipse FPGA - Selectable options include 10K-ohm pull-up, 10K-ohm pull-down, tri-state - Logic analyzer and wire-wrap access through dual-row header strips JTAG access support SMA connectors for all clock inputs to the board BNC connectors for all power supply and voltage reference inputs Extensive prototyping area to support convenient inclusion of customer circuitry Current sense circuitry for the 2.5V and 3.3V inputs. INTRODUCTION The UT8RHEEB-288PC Evaluation Board supplies users of the UT6325 RadTol Eclipse FPGA with a quick, convenient environment for evaluating the 280-PBGA and 288- CQFP packaged versions of the UT6325 RadTol Eclipse FPGA. To maximize the user s ability to control and access every FPGA I/O, the UT8RHEEB-288PC provides 10K-ohm, switchselectable, I/O bias to either V CCIO or V SS. If the user does not wish to bias an FPGA I/O signal, the net may be isolated from either power supply rail. All FPGA I/O s are connected to dualrow headers which are optimized to interface with Tektronix logic analyzer pods. Furthermore, the header pins protrude ~ 1/2" below the board in order to provide wire-wrap access to the respective FPGA I/O. Coupling the wire-wrap access with local prototyping area, the UT8RHEEB-28P8C permits the user to interface customer circuitry to the UT6325 RadTol Eclipse FPGA. The board s flexible design demonstrates some of the capabilities of the 280-PBGA and 288-CQFP UT6325 RadTol Eclipse FPGA devices, and enables fast development with full pin access and code verification. Because the UT8RHEEB- 288PC includes both sockets for evaluating the UT6325 and provides the user with full access to the FPGA s I/O, the board can be used to verify proper programming of the device prior to installing it onto your target PCB. Bottom Side Top Side 17

2 HARDWARE DESCRIPTION Table 1: The UT8RHEEB-288PC Evaluation Board contains the following functional components Name Description SKT1 SKT2 J47 J48 J62-J69 J13-J21 SW1-4 SW6-11 SW13-16 SW18-23 SW5, SW12, SW17, SW24 J2-J11 J30-J34 J36-J40 J1, J12, J35, J41 SW25-SW28 J42-J45 J46 SW29 J58 J CQFP socket for Aeroflex s 288 pin Ceramic Quad Flat Pack Eclipse FPGA devices. SKT1 is on the bottom-side of the board. Note that the 288-CQFP is loaded with the lid down into the socket for proper contact. 280-PBGA socket for Aeroflex s 280 pin Plastic Ball Grid Array Eclipse FPGA devices. BNC Connector Input for VCC CORE (+2.5V) BNC Connector Input for VCCIO (+3.3V) BNC Connectors for INREFA INREFH Connectors are tied to ground with a 10K-ohm resistor Leave INREF signals tied to ground for normal I/O operation (LVTTL, LVCMOS3, PCI standards). Future compatibility with GTL+ and SSTL3 signals will require a differential reference voltage. SMA Connectors for CLK0-CLK8 input clock signals 8-switch and 4-switch SP3T dip switches Setting the respective switch to the + position ties the corresponding I/O to VCCIO via a 10K-ohm pull up resistor Setting the respective switch to the - position ties the corresponding I/O to VSS via a 10K-ohm pull down resistor Setting the respective switch to the 0 position isolates the corresponding I/O from either power supply rail by floating the net 16-Pin, and 8-Pin Dual-Row Headers FPGA I/Os are available at the connectors Tektronix Logic Analyzer Pods can plug directly onto the connectors Wire-wrap access is available at these headers on the bottom-side of the board 4-switch SP3T DIP switches for IOCTRL-IOCTRLH Setting the respective switch to the + position ties the corresponding IOCTRL to VCCIO via a 10K-ohm pull up resistor Setting the respective switch to the - position ties the corresponding IOCTRL to VSS via a 10K-ohm pull down resistor Setting the respective switch to the 0 position isolates the corresponding IOCTRL from either power supply rail by floating the net 8-Pin Dual-Row Headers The IOCTRLA-IOCTRLH signals are available through these connectors JTAG Connector with removed pin for keyed mating connector The signals are defined in the PCB silkscreen PLL Reset Circuitry SW29 is a manual PLL reset (result is PLLRST active high at FPGA) J58 is an external user PLL reset (active low at pin results in PLL active high reset at FPGA) J109 is a 4-pin PLL reset monitor connector Note: Hold PLL reset switch or J58 low for at least 1 sec. to reset PLL. J49, J59, J60, J61 SMA Connectors to monitor PLLOUT0 PLLOUT 3 J110, J111 2-Pin Headers to monitor current for 3.3V and 2.5V supplies The translation is 1 Volt/Amp from the current sense ICs, U3 and U2 Prototype Area Prototype area VCCIO (3.3V), VCC CORE (2.5V), and GND are labeled in the silkscreen

3 Table 2: 288CQFP to 280 PBGA Pinout (Net Name, Switch used & Access Point) 288 CQFP 280 PBGA Net Name Switch Access Point 1 E5 GND N/A GND_TP 2 L5 VCC_25V N/A U2-6,7 3 A18 PLLRST1 N/A J109 4 B17 VCC_25V N/A U2-6,7 5 C16 IOE15 SW19 J36 6 A17 IOE6 SW13 J30 7 D15 IOE23 SW14 J31 8 B16 IOE11 SW19 J36 9 A16 IOE5 SW13 J30 10 B15 IOE10 SW19 J36 11 D14 IOE22 SW14 J31 12 A15 IOE4 SW13 J30 13 C14 IOE14 SW19 J36 14 E6 VCC_25V N/A U2-6,7 15 E10 GND N/A GND_TP 16 C11 VCC_33V N/A U3-6,7 17 A14 IOCTRLE1 SW27 J44 18 D13 INREFE N/A J78 19 B13 IOCTRLE2 SW27 J44 20 B14 IOE9 SW19 J36 21 C13 IOE13 SW19 J36 22 A13 IOE3 SW13 J30 23 D12 IOE21 SW14 J31 24 C12 IOE12 SW19 J36 25 B12 IOE8 SW13 J30 26 A12 IOE2 SW13 J30 27 D11 IOE20 SW14 J31 28 C15 VCC_33V N/A U3-6,7 29 E11 GND N/A GND_TP 30 E7 VCC_25V N/A U2-6,7 31 B11 IOE7 SW13 J30 32 A11 IOE1 SW13 J30 33 D10 IOE19 SW14 J31 34 C10 CLK5 N/A SKT1 35 B10 CLK6 N/A SKT1 36 A10 CLK7 N/A SKT1 37 D9 CLK8 N/A SKT1 38 B9 TMS N/A J46 39 A9 IOF6 SW20 J37 40 D8 IOF22 SW21 J38 41 C8 IOF16 SW15 J32

4 288 CQFP 280 PBGA Net Name Switch Access Point 42 B8 IOF11 SW15 J32 43 M5 VCC_25V N/A U2-6,7 44 E14 GND N/A GND_TP 45 C5 VCC_33V N/A U3-6,7 46 A8 IOF5 SW20 J37 47 D7 IOF21 SW21 J38 48 C7 IOF15 SW15 J32 49 B7 IOF10 SW15 J32 50 A7 IOF4 SW20 J37 51 D6 IOF20 SW21 J38 52 B6 INREFF N/A J79 53 C6 IOCTRLF1 SW27 J44 54 A6 IOCTRLF2 SW27 J44 55 D5 IOF19 SW21 J38 56 B5 IOF9 SW15 J32 57 C9 VCC_33V N/A U3-6,7 58 E15 GND N/A GND_TP 59 E8 VCC_25V N/A U2-6,7 60 A5 IOF3 SW20 J37 61 D4 IOF18 SW21 J38 62 C4 IOF14 SW15 J32 63 B4 IOF8 SW20 J37 64 A4 IOF2 SW20 J37 65 B3 IOF7 SW20 J37 66 A3 IOF1 SW20 J37 67 C3 IOF13 SW15 J32 68 A1 PLLOUT3 N/A SKT1 69 A2 GND N/A GND_TP 70 C2 VCC_25V N/A U2-6,7 71 M15 VCC_25V N/A U2-6,7 72 F5 GND N/A GND_TP 73 J5 GND N/A GND_TP 74 N5 VCC_25V N/A U2-6,7 75 B2 GND N/A GND_TP 76 B1 PLLRST0 N/A J D3 IOF17 SW21 J38 78 C1 IOF12 SW15 J32 79 E4 IOF23 SW21 J38 80 D2 IOG2 SW16 J33 81 D1 IOG1 SW16 J33 82 F4 IOG6 SW16 J33 83 E2 IOG4 SW16 J33 84 E1 IOG3 SW16 J33

5 288 CQFP 280 PBGA Net Name Switch Access Point 85 F3 IOG5 SW16 J33 86 E9 VCC_25V N/A U2-6,7 87 K5 GND N/A GND_TP 88 E3 VCC_33V N/A U3-6,7 89 G4 IOG9 SW22 J39 90 F2 IOCTRLG1 SW28 J45 91 F1 INREFG N/A J80 92 G3 IOCTRLG2 SW28 J45 93 H4 IOG13 SW22 J39 94 G2 IOG8 SW16 J33 95 G1 IOG7 SW16 J33 96 H3 IOG12 SW22 J39 97 H2 IOG11 SW22 J39 98 H1 IOG10 SW22 J39 99 J4 IOG16 SW22 J J3 VCC_33V N/A U3-6,7 101 K15 GND N/A GND_TP 102 E12 VCC_25V N/A U2-6,7 103 J2 IOG15 SW22 J J1 IOG14 SW22 J K4 IOG18 SW17 J K3 IOG17 SW17 J K2 TCK N/A J H16 VCC_25V N/A U2-6,7 109 L4 IOH3 SW23 J L2 IOH2 SW23 J L1 IOH1 SW23 J M4 IOH7 SW23 J M3 IOH6 SW23 J M2 IOH5 SW23 J N15 VCC_25V N/A U2-6,7 116 L15 GND N/A GND_TP 117 L3 VCC_33V N/A U3-6,7 118 M1 IOH4 SW23 J N4 IOH10 SW18 J N3 IOH9 SW18 J N1 IOCTRLH1 SW28 J N2 IOH8 SW23 J P4 INREFH N/A J P3 IOCTRLH2 SW28 J P1 IOH11 SW18 J P2 IOH12 SW18 J R4 IOH15 SW18 J34

6 288 CQFP 280 PBGA Net Name Switch Access Point 128 R1 IOH13 SW18 J R3 VCC_33V N/A U3-6,7 130 P15 GND N/A GND_TP 131 E13 VCC_25V N/A U2-6,7 132 R2 IOH14 SW18 J T2 IOH17 SW24 J T1 IOH16 SW18 J T3 IOA1 SW1 J2 136 U1 IOA8 SW1 J2 137 U2 IOA9 SW7 J7 138 V1 PLLOUT2 N/A SKT1 139 W1 GND N/A GND_TP 140 V2 GND N/A GND_TP 141 W2 PLLRST3 N/A J U3 VCC_25V N/A U2-6,7 143 P5 VCC_25V N/A U2-6,7 144 R5 GND N/A GND_TP 145 R6 GND N/A GND_TP 146 R7 VCC_25V N/A U2-6,7 147 V3 GND N/A GND_TP 148 W3 IOA18 SW2 J3 149 T4 IOA2 SW1 J2 150 U4 IOA10 SW7 J7 151 V4 IOA13 SW7 J7 152 W4 IOA19 SW2 J3 153 T5 IOA3 SW1 J2 154 V5 IOA14 SW7 J7 155 W5 IOA20 SW2 J3 156 T6 IOCTRLA1 SW25 J U6 INREFA N/A J F15 VCC_25V N/A U2-6,7 159 R9 GND N/A GND_TP 160 U5 VCC_33V N/A U3-6,7 161 V6 IOCTRLA2 SW25 J W6 IOA21 SW2 J3 163 U7 IOA11 SW7 J7 164 V7 IOA15 SW7 J7 165 W7 IOA22 SW2 J3 166 T7 IOA4 SW1 J2 167 T8 IOA5 SW1 J2 168 V8 IOA16 SW7 J7 169 W8 IOA23 SW2 J3 170 U8 IOA12 SW7 J7

7 288 CQFP 280 PBGA Net Name Switch Access Point 171 T9 IOA6 SW1 J2 172 U9 VCC_33V N/A U3-6,7 173 R10 GND N/A GND_TP 174 G5 VCC_25V N/A U2-6,7 175 V9 IOA17 SW2 J3 176 T10 IOA7 SW1 J2 177 W9 TDI N/A J U10 CLK0 N/A SKT1 179 V10 CLK1 N/A SKT1 180 W10 CLK2 N/A SKT1 181 T11 CLK3 N/A SKT1 182 V11 CLK4 N/A SKT1 183 W11 IOB17 SW9 J9 184 T12 IOB1 SW8 J8 185 U12 IOB8 SW8 J8 186 V12 IOB12 SW3 J4 187 R8 VCC_25V N/A U2-6,7 188 R15 GND N/A GND_TP 189 U11 VCC_33V N/A U3-6,7 190 W12 IOB18 SW9 J9 191 U13 IOB9 SW3 J4 192 V13 IOB13 SW3 J4 193 W13 IOB19 SW9 J9 194 T13 IOB2 SW8 J8 195 U14 IOCTRLB1 SW25 J V14 INREFB N/A J W14 IOCTRLB2 SW25 J T14 IOB3 SW8 J8 199 V15 IOB14 SW3 J4 200 W15 IOB20 SW9 J9 201 U15 VCC_33V N/A U3-6, GND N/A GND_TP 203 G15 VCC_25V N/A U2-6,7 204 T15 IOB4 SW8 J8 205 V16 IOB15 SW3 J4 206 W16 IOB21 SW9 J9 207 U16 IOB10 SW3 J4 208 T16 IOB5 SW8 J8 209 W17 IOB22 SW9 J9 210 V17 IOB16 SW3 J4 211 U17 TDO N/A J W19 PLLOUT1 N/A SKT1 213 V18 GND N/A GND_TP

8 288 CQFP 280 PBGA Net Name Switch Access Point 214 W18 IOB23 SW9 J9 215 R11 VCC_25V N/A U2-6, GND N/A GND_TP GND N/A GND_TP 218 R12 VCC_25V N/A U2-6,7 219 V19 GND N/A GND_TP 220 T17 VCC_25V N/A U2-6,7 221 U18 PLLRST2 N/A J U19 IOB11 SW3 J4 223 T18 IOB6 SW8 J8 224 T19 IOB7 SW8 J8 225 R16 IOC16 SW10 J R18 IOC17 SW5 J1 227 P16 IOC12 SW10 J R19 IOC18 SW5 J1 229 P17 IOC13 SW10 J H5 VCC_25V N/A U2-6, GND N/A GND_TP 232 L17 VCC_33V N/A U3-6,7 233 P18 IOC14 SW10 J N16 IOC10 SW10 J P19 IOC15 SW10 J N17 IOC11 SW10 J N18 IOCTRLC1 SW26 J M16 INREFC N/A J N19 IOCTRLC2 SW26 J M17 IOC7 SW4 J5 241 M18 IOC8 SW4 J5 242 L16 IOC4 SW4 J5 243 M19 IOC9 SW10 J R17 VCC_33V N/A U3-6, GND N/A GND_TP 246 H15 VCC_25V N/A U2-6,7 247 L18 IOC5 SW4 J5 248 L19 IOC6 SW4 J5 249 K16 IOC2 SW4 J5 250 J16 IOC1 SW4 J5 251 K18 IOC3 SW4 J5 252 K19 TRSTB N/A J K1 VCC_25V N/A U2-6,7 254 K17 IOD18 SW12 J J18 IOD16 SW6 J6 256 J19 IOD17 SW12 J12

9 288 CQFP 280 PBGA Net Name Switch Access Point 257 H17 IOD13 SW6 J6 258 H18 IOD14 SW6 J6 259 R13 VCC_25V N/A U2-6, GND N/A GND_TP 261 E17 VCC_33V N/A U3-6,7 262 H19 IOD15 SW6 J6 263 G16 IOD9 SW6 J6 264 G17 IOD10 SW6 J6 265 G18 IOD11 SW6 J6 266 G19 IOD12 SW6 J6 267 F17 IOD6 SW11 J F18 IOD7 SW11 J F19 IOD8 SW11 J F16 IOCTRLD1 SW26 J E18 INREFD N/A J E19 IOCTRLD2 SW26 J J17 VCC_33V N/A U3-6, GND N/A GND_TP 275 J15 VCC_25V N/A U2-6,7 276 E16 IOD5 SW11 J D18 IOD3 SW11 J D19 IOD4 SW11 J D17 IOD2 SW11 J D16 IOD1 SW11 J C19 IOE18 SW14 J C18 IOE17 SW14 J C17 IOE16 SW19 J B19 PLLOUT0 N/A SKT1 285 A19 GND N/A GND_TP 286 B18 GND N/A GND_TP 287 R14 VCC_25V N/A U2-6, GND N/A GND_TP

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18 ORDERING INFORMATION UT CQFP and 280-PBGA RadTol FPGA Evaluation Board: UT8RHEEB-288 ** Configuration options: (PC) = 280-PBGA and 288-CQFP Base Part Number: Note 1 UT8RHEEB-288 = UT6325 Evaluation Board with both 280-PBGA and 288-CQFP package support NOTE 1: The UT8RHEEB-288PC does not include an FPGA. The user should place an order for the FPGA required for their evaluation purposes. 18

19 Aeroflex Colorado Springs - Datasheet Definition Advanced Datasheet - Product In Development Preliminary Datasheet - Shipping Prototype Datasheet - Shipping QML & Reduced Hi-Rel COLORADO Toll Free: Fax: SE AND MID-ATLANTIC Tel: Fax: INTERNATIONAL Tel: Fax: WEST COAST Tel: Fax: NORTHEAST Tel: Fax: CENTRAL Tel: Fax: info-ams@aeroflex.com Aeroflex Colorado Springs, Inc. reserves the right to make changes to any products and services herein at any time without notice. Consult Aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. Aeroflex does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by Aeroflex; nor does the purchase, lease, or use of a product or service from Aeroflex convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of Aeroflex or of third parties. Our passion for performance is defined by three attributes represented by these three icons: solution-minded, performance-driven and customer-focused 19