LINE WIDTH IMPEDANCE CHART FOR REFERENCE 90 OHM DIFF SPACE LINE WIDTH SPACE LAYER 3.75 MILS TOP,BOTTOM INNER LAYER 4.5 MILS 6.25 MIL 4.
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- Aubrey Gallagher
- 5 years ago
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1 REVISIONS REV DESRIPTION DATE APPROVED D NOTES:. FABRIATE TO IP-A-600,URRENT REVISION. 2. BOARD SHALL MEET THE INSPETION RITERIA OF IP-A-600,LASS 2,URRENT REVISION. 3 MATERIAL: PL-FR-370HR 4. WEIGHT OF ALL OPPER LAYERS SHALL NOT BE LESS 0. OZ. PER SQUARE FOOT.. THE LAYERS SPEIFIED ON THE ROSS SETION FOR REFERENE ONLY, USE STAK-UP PROVIDED IN THE FABRIATION DATA PAKAGE. 6. APPLY SOLDER MASK OVER BARE OPPER(SMBO) IAW IP-SM-840,BOTH SIDES,USING LPI,OLOR GREEN LAYER TOP,BOTTOM INNER LAYER LINE WIDTH IMPEDANE HART FOR REFERENE SINGLE ENDED 00 OHM DIFF LINE WIDTH LINE WIDTH 4. MILS 4. MILS 3.7 MILS 3.7 MILS SPAE 6.2 MIL 6.2 MIL 90 OHM DIFF SPAE LINE WIDTH D 7 FINISH: GOLD IMMERSION. B SLOT SIZE IN MILS SLOT:39.37x8. SLOT SIZE IN MILS SLOT:8.X SLOT SIZE IN MILS SLOT:39.37x SILKSREEN TOP SIDE/BOTH SIDES WITH NON-ONDUTIVE EPOXY BASED INK. OLOR SHALL BE WHITE A ONTRASTING INK WITH RESPET TO SOLDER MASK OLOR. DISTORTION OF SILKSREEN IS AEPTABLE OVER TRAES. EPOXY INK ON PLATED LANDS IS NOT AEPTABLE. 9. VENDOR LOGO AND DATE ODE TO BE MAKED FAR SIDE. MAXIMUM HEIGHT.2 INHES % ELETRIAL TEST REQUIRED FOR ONTINUITY. BOARD SHALL HAVE A UL RATING OF 94V-0. UL SYMBOL AND RATING SHAL BE MARKED FARSIDE.. REMOVE ALL UNUSED PADS FROM INTERNAL LAYERS. 2. SOLDER MASK FOLLOW GERBER DATA FOR TOP & BOTTOM SIDE. 3. SOLDER MASK REGISTRATION TO BE WITHIN DIAMETRIAL TRUE POSITION OF / WITH APPLIABLE HOLE / PAD X GERBERS/ODB USED FOR FAB MUST BE VERIFIED AGAINST THE PROVIDED IP36 NETLIST.. USE ARTMASTER # PRE-SOLDERMASK OPERATION: ALL VIAS ON PRIMARY SIDE (TOP) ENROAHED AND PLUGGED FROM BGA ATTAHMENT SIDE (DEFAULT TOP). ENSURE THESE VIAS ARE PLUGGED LEAVING NO ASSOIATED METAL EXPOSED. 7. OPPER THIEVING NOT ALLOWED ON EXTERNAL LAYERS FIGURE SIZE x x39.37 DRILL HART: TOP to BOTTOM ALL UNITS ARE IN MILS TOLERANE PLATED QTY 0.0/-0.0 PLATED /-3.0 PLATED 8 3.0/-3.0 PLATED 9 3.0/-3.0 PLATED 3.0/-3.0 PLATED 7 3.0/-3.0 PLATED /-3.0 PLATED 2 PLATED 8 PLATED PLATED PLATED PLATED 3.0/ / / / / / / / / / / /-3.0 NON-PLATED NON-PLATED NON-PLATED NON-PLATED NON-PLATED PLATED PLATED TOTAL HOLES: ADDITIONAL MAY BE PLUGGED STAK-UP FOR REFERENE MAY USE PROVIDED STAK-UP TOP SIDE LAYER L_TOP PRE-PREG 370HR LAYER 2 L2_ ORE 370HR LAYER 3 L3_INNER PRE-PREG 370HR LAYER 4 L4_INNER ORE 370HR LAYER L_ PRE-PREG 370HR LAYER 6 L6_INNER ORE 370HR LAYER 7 L7_INNER PRE-PREG 370HR LAYER 8 L8_ 0.00/-0% ORE 370HR LAYER 9 L9_PWR PRE-PREG 370HR LAYER 0 L0_PWR ORE 370HR LAYER L_ PRE-PREG 370HR LAYER 2 L2_INNER ORE 370HR LAYER 3 L3_INNER PRE-PREG 370HR LAYER 4 L4_ ORE 370HR LAYER L_PWR PRE-PREG 370HR LAYER 6 L6_BOTTOM DETAIL A SALE:NONE 3 /2 OZ U PREPREG /2 OZ U ORE /2 OZ U PREPREG /2 OZ U ORE /2 OZ U PREPREG /2 OZ U ORE /2 OZ U PREPREG /2 OZ U ORE /2 OZ U PREPREG /2 OZ U ORE /2 OZ U PREPREG /2 OZ U ORE /2 OZ U PREPREG /2 OZ U ORE /2 OZ U PREPREG /2 OZ U B ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: DATE: AUGUST 06,2009 A RESTRITION NOTIE THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED 2009 XILINX IN. UNLESS OTHERWISE SPEIFIED DIMENSIONS ARE IN INHES TOLERANES ON; 2 PL DEIMALS / PL DEIMALS /-.00 ANGLES FRATIONS SIGNATURES DRAWN HEKED ENGRG BRIAN FORSSE ISSUED DATE 04/07/09 SP60 EVALUATION PLATFORM PB, ROHS, OMPLIANT A SIZE D SALE FSM NO NONE DWG NO SHEET OF REV
2 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L_TOP THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
3 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L2_ THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
4 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L3_INNER THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
5 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L4_INNER THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
6 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L_ THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
7 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L6_INNER THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
8 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L7_INNER THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
9 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L8_ THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
10 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L9_PWR THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
11 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L0_PWR THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
12 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L_ THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
13 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L2_INNER THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
14 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L3_INNER THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
15 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L4_ THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
16 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L_PWR THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
17 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: L6_BOTTOM THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
18 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: MASK_BOTTOM THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
19 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: MASK_TOP THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
20 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: PASTE_BOT THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
21 ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: PASTE_TOP THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
22 M2 M9 R8 TP2 P3 P4 27 TP TP TP3 P2 R8 TP TP6 R32 R R64 R43 R42 R4 R63 R34 P RP4 72 R4 R4 48 TP3 R08 63 R67 R39 6 R33 R62 2 TP4 R77 R69 R TP R0 R09 R6 R37 R44 TP7 60 R R86 9 JBVEBFPKRLEMBMRSJZ 62 6 TP R47 R R2 R22 R6 R69 R TP7 R74 R78 R72 R76 R70 R R76 R07 R06 TP R38 R34 TP8 R3 R37 R36 R3 3 TP 9 R 8 6 R202 R73 60 R23 9 R98 R3 24 R29 Q R40 R39 2 R3 R 2 R R4 R26 R2 R24 R2 R9 R R9 R27 R30 0 R9 R94 90 R92 R93 TP M7 R0 R R2 R20 ASSY P/N RP2 R3 R60 3 RP3 R9 R7 R84 R87 R9 28 R8 R2 R97 R8 R86 R R2 R6 R96 R R67 R7 R80 R73 R68 R87 9 R94 R3 R84 R6 62 R77 09 R7 7 R R R63 R64 R6 26 R62 R66 R0 R83 R R33 R32 22 R6 82 R R9 R22 R24 R88 R29 R27 R26 R28 ARTWORK, SP60 EVALUATION PLATFORM SILK_BOT LAYER: ARTMASTER # AUGUST 06,2009 DATE: (408) PHONE: RESTRITION NOTIE THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED 2009 XILINX IN. 64 R20 R200 R99 R7 R8 R4 R36 R3 R40 R68 TP9 R6 R47 R48 R49 R44 R7 R8 R46 R9 R43 R70 R42 R74 R83 R7 R4 R38 R72 R66 R82 7 R20 4 R
23 M 3 X RP J3 R M4 2 TX RX DUP J9 2V 63 R60 37 D L2 R9 c 2009 Xilinx, Incorporated 0/00/000 ETHERNET F47 F3 DS7 DS6 DS DS4 DS3 DS2 USB UART R99 R00 R98 R02 R97 R0 R96 R03 GPIO HDR TP V M0 M3 J8 SPI SELET R04 MA ID X3 3 INIT DS0 DONE DS9 OFF:SPI EXT ON: SPI X4 7 J3 MISO MOSI LK S_B U8 6 U4 J2 J ON SPI PROG SW R30 R23 R90 R3 R89 TMS TDI TDO TK 3V3 R48 U 8.0V TP 36 TP2 USER_LOK SPI X4 U0 BPI FLASH 89 R4 P U3 SUSPEND TP3 3.0V POWER FM LP J R3 II J6 R2 R203 II EPROM DS8 R88 R8 J4 R49 OFF TP6 TP DS X2 U7 68 AWAKE U7 34 R204 U TP4 TP4 2.V TP V UR 2.V UR V U2 DDR2 SDRAM 64 P/N HW-S6-SP60-G SP60 REV SYSLK SMALKP TP U U20 TP0 TP9 R PNMLKJHGFE DB A U V UR VINT UR J7 VINT TP7 26 SMALKN 33 U9 TP TP8.8V TP U3 J J R80 R79 Y U4 U6 7 PWR GOOD DS 49 U2 32 L 6 R78 Q2 46 R6 DS778 R7 R93 R92 U9 STATUS MODE SELETION ON OFF: SPI FLASH OFF OFF: BPI FLASH DS6 SW3 SW9 M0 M -2: EXLUDE FM 2-3: INLUDE FM GPIO DIP SW GPIO LED3 GPIO LED2 GPIO LED DS3 DS2 U2 DS4 GPIO LED0 DS GPIO LEDS 74 U8 88 USB JTAG SW8 M2 SW2 J4 J0 FM JTAG GPIO BUTTON3 PROG PU RESET SW7 GPIO BUTTON2 SW GPIO BUTTON SW4 GPIO BUTTON0 0.9V TP M8 SW M R90 R9 GPIO MOMENTARY ARTWORK, SP60 EVALUATION PLATFORM SILK_TOP LAYER: ARTMASTER # AUGUST 06,2009 DATE: (408) PHONE: RESTRITION NOTIE THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED 2009 XILINX IN.
24 2 JBVEBFPKRLEMBMRSJZ ASSY P/N ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: SILK_BOT THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN.
25 R PNMLKJHGFE DB A ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED RESTRITION NOTIE 2009 XILINX IN. LAYER:
26 M2 M9 R8 TP2 P3 P4 27 TP TP TP3 P2 R8 TP TP6 R32 R R4 R63 R34 P RP4 72 R4 R4 48 TP3 R08 63 R33 R62 2 TP4 R77 R69 R TP R0 R R6 R37 R44 TP7 60 R R TP R47 R R2 R22 R6 R69 R TP7 R76 R70 R R76 R07 R06 TP R38 R34 TP8 R3 R37 R36 R3 3 TP 9 R 8 6 R202 R73 60 R23 9 R98 R3 24 R29 Q R40 R39 2 R3 R 2 R R4 R26 R2 R24 R2 R9 R R9 R27 R30 0 R9 R94 90 R92 R93 TP M7 R0 R R2 R20 M 3 X RP J3 R M4 2 TX RX DUP V J9 63 R60 37 D L2 R9 c 2009 Xilinx, Incorporated 0/00/000 ETHERNET F47 F3 DS7 DS6 DS DS4 DS3 DS2 USB UART R99 R00 R98 R02 R97 R0 R96 R03 GPIO HDR TP V M0 M3 J8 SPI SELET R04 MA ID X3 3 RP2 INIT DS0 DONE DS9 OFF:SPI EXT ON: SPI X4 7 J3 MISO MOSI LK S_B U8 6 R3 R60 3 U4 J2 J ON SPI PROG SW RP3 R9 R30 R23 R90 R3 R89 R7 R84 R87 TMS TDI TDO TK 3V3 R48 R9 U 8.0V TP 36 TP2 USER_LOK SPI X4 U0 BPI FLASH 89 R4 P 28 R8 U3 SUSPEND R2 FM LP J R97 TP3 3.0V R8 R86 POWER R R2 R6 R96 R36 R3 R64 R43 R42 R8 R9 R3 II J6 R2 R203 R204 R67 II EPROM DS8 R88 R8 J4 R49 OFF TP6 TP DS X2 R U7 68 AWAKE V TP V UR 2.V UR R67 R U7 R7 R80 R73 R R87 9 U 94 TP4 TP4 R94 R3 3.3V U2 DDR2 SDRAM R84 R6 62 R77 09 R P/N HW-S6-SP60-G TP7 R8 R4 R40 R7 R68 2 R4 R38 R66 9 R82 R72 7 R R R74 R78 SP60 REV R SYSLK SMALKP 66 U 3 64 R200 4 R99 TP9 3 2 R R U20 TP0 TP9 R43 R70 R42 R7 7 R PNMLKJHGFE DB A U V UR VINT UR 99 R63 R64 R6 26 R62 R66 R0 R83 R8 43 J7 VINT TP SMALKN U9 TP TP8.8V TP U R33 R32 22 J8 J R6 R93 R47 R48 R49 R44 R92 U9 R7 R46 R74 R83 R7 24 R6 PWR GOOD DS R80 R79 Y DS R U4 U6 7 Q L U R78 46 R6 R7 STATUS MODE SELETION ON OFF: SPI FLASH OFF OFF: BPI FLASH DS6 3 SW3 SW9 M0 M -2: EXLUDE FM 2-3: INLUDE FM GPIO DIP SW GPIO LED3 GPIO LED2 GPIO LED DS3 DS2 U2 DS4 GPIO LED0 DS GPIO LEDS 74 U8 USB JTAG SW8 R9 M2 R24 R88 SW2 J4 J0 R22 GPIO BUTTON3 R29 88 R27 R26 R28 FM JTAG PROG PU RESET SW7 GPIO BUTTON2 SW GPIO BUTTON SW4 GPIO BUTTON0 0.9V TP M8 SW M R90 R9 GPIO MOMENTARY ARTWORK, SP60 EVALUATION PLATFORM SILK_TOP LAYER: ARTMASTER # AUGUST 06,2009 DATE: (408) PHONE: RESTRITION NOTIE THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED 2009 XILINX IN.
27 c Xilinx, Incorporated TX RX DUP V USB UART GPIO HDR.0V 0/00/000 ETHERNET MA ID INIT DONE OFF:SPI EXT ON: SPI X4 SPI SELET MISO MOSI LK S_B ON SPI PROG TMS TDI TDO TK 3V3.0V USER_LOK SPI X4 BPI FLASH 3.0V SUSPEND POWER FM LP OFF II EPROM 3.3V UR 2.V UR II AWAKE 2.V 3.3V DDR2 SDRAM P/N HW-S6-SP60-G SP60 REV SYSLK SMALKP 3 2 R PNMLKJHGFE DB A.8V UR VINT UR VINT SMALKN.8V PWR GOOD STATUS MODE SELETION ON OFF: SPI FLASH OFF OFF: BPI FLASH GPIO LEDS M0 M -2: EXLUDE FM 2-3: INLUDE FM GPIO DIP SW GPIO LED3 GPIO LED2 GPIO LED GPIO LED0 USB JTAG FM JTAG GPIO BUTTON3 GPIO BUTTON2 GPIO BUTTON GPIO BUTTON0 0.9V PROG PU RESET GPIO MOMENTARY ARTWORK, SP60 EVALUATION PLATFORM SILK_TOP LAYER: ARTMASTER # AUGUST 06,2009 DATE: (408) PHONE: RESTRITION NOTIE THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED 2009 XILINX IN.
28 c 2009 Xilinx, Incorporated TX RX DUP V FM LP USB UART GPIO HDR.0V 0/00/000 ETHERNET MA ID INIT DONE OFF:SPI EXT ON: SPI X4 SPI SELET MISO MOSI LK S_B ON SPI PROG TMS TDI TDO TK 3V3.0V USER_LOK SPI X4 BPI FLASH II P/N HW-S6-SP60-G PROG 3.0V SUSPEND POWER OFF 2.V AWAKE II EPROM 3.3V UR 2.V UR 3.3V DDR2 SDRAM SP60 REV SYSLK SMALKP 3 2 R PNMLKJHGFE DB A.8V UR VINT UR VINT SMALKN.8V PWR GOOD STATUS MODE SELETION ON OFF: SPI FLASH OFF OFF: BPI FLASH GPIO LEDS M0 M -2: EXLUDE FM 2-3: INLUDE FM GPIO DIP SW GPIO LED3 GPIO LED2 GPIO LED GPIO LED0 USB JTAG FM JTAG GPIO BUTTON3 GPIO BUTTON2 GPIO BUTTON GPIO BUTTON0 0.9V PU RESET GPIO MOMENTARY ARTWORK, SP60 EVALUATION PLATFORM SILK_TOP LAYER: ARTMASTER # AUGUST 06,2009 DATE: (408) PHONE: RESTRITION NOTIE THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED 2009 XILINX IN.
29 THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS ARTMASTER # RESTRITION NOTIE PHONE: DATE: LAYER: ARTWORK, SP60 EVALUATION PLATFORM (408) AUGUST 06,2009 SILK_BOT 2009 XILINX IN. M9 R8 TP2 TP TP3 R34 R63 R4 R9 R8 TP TP6 R42 R43 R64 R3 R36 6 R39 R67 63 R08 R68 R40 R4 R44 R37 R6 R20 62 R77 R4 R R69 4 R6 R20 R22 7 R2 R82 6 R66 R72 R38 R4 8 R46 R47 R42 R70 R43 R7 R8 TP9 TP0 R99 R R7 9 R23 60 R83 R74 R46 R7 R44 R49 R48 R47 R73 R202 6 R6 R9 M7 TP R28 TP2 P3 27 P R60 R3 2 R9 4 R84 R87 R RP2 RP R9 28 R96 R6 0 9 R R2 R86 R8 R97 R8 P2 R2 R32 R6 R8 P 7 TP R4 R4 R RP4 72 TP R62 R33 2 TP4 R3 R94 04 TP R87 R09 R0 R68 R7 R69 R77 R73 R80 R7 R R8 R84 R6 6 R JBVEBFPKRLEMBMRSJZ TP7 TP6 R06 R07 R R34 R38 TP8 TP 30 3 R37 R36 R R8 R83 99 R R2 R 7 R66 R6 R0 R62 26 R64 R79 R7 R70 R76 R63 R72 R78 R R32 R R R R28 82 R0 87 R R24 R2 R26 R2 R R4 R39 R40 R3 R98 8 R 2 2 R3 R6 Q 20 R9 R27 R R94 90 R92 R93 R26 R27 R29 R22 R2 R20 R9 R R0 R88 R24 ASSY P/N M2
30 A B D FRATIONS ANGLES 2 PL DEIMALS / PL DEIMALS /-.00 TOLERANES ON; UNLESS OTHERWISE SPEIFIED DIMENSIONS ARE IN INHES ISSUED ENGRG HEKED DRAWN SIGNATURES 2 BRIAN FORSSE 2 REV 04/07/09 DATE SALE D SIZE FSM NO DESRIPTION REVISIONS DWG NO SHEET DATE APPROVED REV A B D R08 R42 TP6 R8 TP R48 R47 TP9 R67 63 R44 R49 R39 6 TP R46 R7 R43 R9 R8 R83 R74 R70 R42 R4 R63 TP TP2 60 R23 R47 R46 R34 M9 R7 9 8 R4 R38 6 R72 R82 R66 M7 R22 R2 7 R20 R6 R69 4 R R4 NONE SP60 EVALUATION PLATFORM ASSY, ROHS OMPLIANT OF 2 R2 R R 24 9 R27 R R93 87 R9 8 R6 R3 R96 R9 TP2 R26 R0 TP TP8 TP6 TP7 TP7 TP4 TP4 TP3 R92 TP3 R28 R9 62 R77 R R6 R20 R99 R44 R37 R36 R7 R8 R4 R40 R3 6 R6 TP0 R68 R43 R64 R73 R R R97 R R37 R36 R3 R34 R38 R06 R76 R R R7 R22 02 R8 R86 R84 R87 R94 R30 R28 82 R32 R33 3 R29 28 R R83 R32 R6 R2 R R39 R4 R40 R3 R98 R R2 2 SEONDARY SIDE R4 R 66 R2 R24 R26 R R RP4 2 R79 R64 2 R7 R68 R62 R33 30 P R R0 26 R6 R62 7 R84 R6 29 R3 90 R66 R R8 0 R60 ASSY P/N 2 23 R P 28 R R86 R0 R09 27 R M2 R24 JBVEBFPKRLEMBMRSJZ 72 7 R9 Q 70 R88 2 RP3 RP2 R6 P2 R P4 R0 R78 R74 R7 R67 R8 27 R R3 R72 R R80 R73 R9 R76 R70 R7 R77 R69
31 D B A UNLESS OTHERWISE SPEIFIED DIMENSIONS ARE IN INHES TOLERANES ON; 2 PL DEIMALS / PL DEIMALS /-.00 ANGLES FRATIONS 2 SIGNATURES DRAWN HEKED ENGRG BRIAN FORSSE ISSUED 2 REV DATE 04/07/09 SIZE FSM NO D SALE REVISIONS DESRIPTION DWG NO DATE APPROVED SHEET REV D A B R NONE ASSY, ROHS OMPLIANT NOTES: (UNLESS OTHERWISE SPEIFIED). ASSEMBLE TO MEET INSPETION RITERIA OF IP-A-60, LASS 2, URRENT REVISION. 2. BAG AND TAG (OR MARK ONTAINER) WITH PART NUMBER. SP60 EVALUATION PLATFORM 3. REFERENE SHEMATI (OR AVL) FOR BILL OF MATERIALS OF 2 M 3 X RP J3 R M4 2 TX RX DUP V 63 R60 37 D L2 R9 c 2009 Xilinx, Incorporated 0/00/000 ETHERNET F47 F3 DS7 DS6 DS DS4 DS3 DS2 USB UART J9 R99 R00 R98 R02 R97 R0 R96 R03 GPIO HDR TP V M0 J8 M3 SPI SELET 7 R04 MA ID X3 3 INIT DS0 DONE DS9 OFF:SPI EXT ON: SPI X4 MISO MOSI LK S_B J3 U8 6 U4 J2 J 36 ON SPI PROG SW R30 R23 R90 R3 R89 TMS TDI TDO TK 3V3 R48.0V TP TP2 U 8 USER_LOK SPI X4 U0 BPI FLASH 89 P 3.0V U3 FM LP J R3 R203 II EPROM AWAKE DS8 R88 R8 J4 SUSPEND TP3 R49 R4 POWER OFF TP6 TP DS X2 U7 68 II J6 R2 U7 34 TP4 2.V TP V UR 2.V UR 20 R204 U 3.3V TP4 DDR2 SDRAM 64 U2 P/N HW-S6-SP60-G TP7 SP60 REV SYSLK SMALKP U 9 3 U20 TP9 PNMLKJHGFE DB A U V UR TP0 VINT UR J7 SMALKN 33 U9 U3 TP TP8.8V TP6 TP7 VINT J J R93 Y R80 R79 U4 Q2 U6 DS778 R92 U9 DS L 6 R78 46 R6 R7 PWR GOOD SW3 SW9 M0 M MODE SELETION ON OFF: SPI FLASH OFF OFF: BPI FLASH U2 32 STATUS 76 DS6-2: EXLUDE FM 2-3: INLUDE FM GPIO DIP SW U2 DS4 GPIO LED3 GPIO LED2 GPIO LED DS3 DS2 GPIO LEDS GPIO LED0 DS 74 U8 88 M2 SW2 J4 J0 USB JTAG SW8 FM JTAG GPIO BUTTON3 SW7 GPIO BUTTON2 SW GPIO BUTTON SW4 GPIO BUTTON0 0.9V TP M8 SW M PROG PU RESET R90 R9 GPIO MOMENTARY ASSEMBLY NO: SILK_TOP ARTWORK, SP60 EVALUATION PLATFORM ARTMASTER # LAYER: AUGUST 06,2009 DATE: (408) PHONE: RESTRITION NOTIE THIS PB ARTWORK ONTAINS INFORMATION WHIH IS PROPRIETARY TO AND IS THE PROPERTY OF XILINX, AND MAY NOT BE USED, REPRODUED OR DISLOSED XILINX IN.
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