Ultracapacitor Based Ride Through System for Control Power Supplies in High Power Converters

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1 16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, Ultracapacitor Baed Ride Through Sytem for Control Power Supplie in High Power Converter Anand Vivek Ravi Department of Electrical Engineering Indian Intitute of Science Bangalore, Karnataka Vinod John Department of Electrical Engineering Indian Intitute of Science Bangalore, Karnataka Abtract High power converter are ued in variable peed induction motor drive application. Riding through a hort term power upply glitch i becoming an important requirement in thee power converter. The power converter ue a large number of control circuit board for it operation. The control power upply need to enure that any glitch in the grid ide doe not affect any of thee control circuit board. A power upply failure of thee control board reult in hut down of the entire ytem. The paper dicue the ride through ytem developed to overcome voltage ag and hort duration outage at the power upply terminal of the control card in thee converter. A 240VA non-iolated, bi-directional buck-boot converter ha been deigned to be ued along with a tack of ultracapacitor to achieve the ame. A micro-controller baed digital control platform i made ue of to achieve the control objective. The deign of the ultracapacitor tack and the bidirectional converter i decribed and the performance of the experimental et-up i evaluated. I. INTRODUCTION The power line diturbance like voltage ag and blackout affect the continuou proce indutrie to a great extent, the everity being dependent on the magnitude and duration of the ag. Fault lating even le than 0.5 can have detrimental effect on the production. Each indutrial equipment react to voltage ag in different way [2]. A voltage ag i defined a a momentary dip in voltage - below 10 % lating from a few cycle (10m) to 150 cycle (0.3) [3]. Voltage ag caue diruption of ervice but do not caue damage to enitive load. On the other hand, the voltage well, which may exit caue damage but a limited one doe not dirupt enitive load. More than 62% of the diturbance are due to voltage ag with duration le than half a econd [3]. A evere voltage ag i one where voltage fall below 85 %. Voltage ag are caued by fault within the ytem, tarting current of motor. In the induction motor drive hown in Fig. 1, voltage ag on the control power upply feeding the control DSP, gate drive card, current and voltage ening card might caue the entire motor drive ytem to hutdown. So a ride-through ytem coniting of DC-DC converter, an energy ource ha been deigned to overcome the effect of thee voltage ag and momentary black-out. Fig. 1. A. The Ride Through Sytem Block diagram of an induction motor drive. The ride through ytem conit of a tack of ultracapacitor charging and dicharging through a bi-directional buckboot converter. The ytem ha been deigned to provide back-up over a period of 10 for a load of 78W. The ride through ytem i hown in Fig. 2. The main power to the control card i fed through the PFC boot converter circuit, coniting of a tranformer-rectifier ytem in cacade with boot converter to make the input current continuou, feeding the bi-directional converter and the ening card in parallel. The ultracapacitor tack i charged through the converter at Fig. 2. Block diagram of the ride through ytem. contant current when the main power i available, and during urge/blackout the capacitor bank dicharge through the

2 16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, boot converter providing a contant voltage to the output. II. ULTRACAPACITORS - MODELLING, DESIGN AND SIZING Ultracapacitor tore energy in electrotatic form unlike batterie which tore energy in electrochemical form. The reult being fater charging of ultracapacitor and longer cycle life. Thee ultracapacitor differ from ordinary electrolytic capacitor with repect to their contructional feature. A Ragone plot [7] how ditinctly the application of the variou energy torage device. The ultracapacitor have power denitie greater than batterie but leer than electrolytic capacitor, and energy denitie greater than electrolytic capacitor but leer than batterie and fuelcell. Literature tudy [4] reveal that ultracapacitor find application bet in tarting of automobile, trapping energy during regenerative braking of motor and ome puled power application where very high power i required in hort time with ubtantial energy. In uch application drawing high power from batterie horten it life and electrolytic capacitor cannot upply energy for more than few milliec without compromiing on cot and volume. Another advantage of ultracapacitor i it large number of charge/dicharge cycle of over 1,00,000; the number being lightly around 1000 for lead-acid batterie, making ultracapacitor more uitable for application involving riding through voltage ag and hort duration blackout a the frequency of occurrence of thee fault i high, potentially occurring almot one every hour. An ultracapacitor conit of two active excited porou carbon electrode. The active excitation increae the diameter of pore on the urface of carbon electrode, aiding the aborption of more ion reulting in very high capacitance per unit volume. Electrolyte act a the ionic conductor flowing between the plate. The very high capacitance i due to the mall thickne of the layer eparating the charge. The electrolyte type and the number of pore determine the typical voltage withtand ability of a ingle ultracapacitor cell. The electrolyte ued can be both aqueou and non-aqueou. The decompoition voltage of aqueou electrolyte like ulphuric acid i about 1.2V and that of the non-aqueou electrolyte are 4V [5]. Typical capacitance of an ultracapacitor varie from a few to 3000 Farad. A. Deign of the Ultracapacitor Stack for the Ride Through Sytem The power requirement of the control circuit board ha been calculated to be 78W for a 250kVA 3-phae inverter in the laboratory. Thi alo conider a afety factor of 2 for the total teady current drawn by the card. For the above power drawn, auming an efficiency of 70% for the converter, the ultracapacitor i ized to provide 125W for 10. 1) Number of Ultracapacitor cell: Prior to calculating the number of ultracapacitor cell required, it would be good to know the dicharge characteritic [1] of ultracapacitor under contant power through the ue of power converter. The dicharge characteritic of the ultracapacitor i given by Fig. 3. A per the ytem pecification, Fig. 3. Dicharge profile of an ultracapacitor. V max = 30V, V min = 13.7V, V nominal = 24V. (1) dv = V nominal V min (2) I max = I min = P V min (3) P V max (4) The maximum current i decided from the ultracapacitor dataheet, which fixe the minimum voltage to which the ultracap can drop to. Thi maximum current level i alo limited by the current rating of the bidirectional DC-DC converter. dv = I avg C t (t + τ) (5) In equation 5, τ i the timecontant of the ultracap which i taken normally a 1.1 and t i the time for the ultracap to provide ride through, in thi cae being 10. Alo I avg i the average of the maximum and minimum ultracapacitor current but for deign purpoe, it can be choen to be equal to the maximum current. Uing 1 to 5 the required capacitance i calculated to be 11F. The number of cell required in erie and parallel i calculated a: C t = C cell parallelcell (6) eriecell The number of erie cell i determined by the voltage rating of the tack. erie cell = V max V cell (7) The number of cell in erie and parallel are calculated to be 12 and 1 repectively. Hence the total number of ultracapacitor cell wa choen to be 12. The ultracapacitor ued were Maxwell BCAP0150 capacitor of capacitance 150F.

3 16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, ) Ultracapacitor voltage management: The rated voltage of the Maxwell BCAP0150 ultracapacitor i 2.7V and urge voltage i 2.85V [1]. The erie connection of the ultracapacitor lead to imbalance in the voltage acro the cell becaue of the difference in elf-dicharge rate and parameter tolerance. Thi can lead to exce voltage on one cell and a leer voltage on ome other cell. To prevent overvoltage acro a particular cell, voltage equalization i done. The Fig. 4. Ultracapacitor cell voltage balancing network. equalization method adopted here i connecting a erie tring of diode, LED and a reitor of appropriate value in parallel with each cell. When the voltage acro each cell i more than forward voltage drop of the diode plu that of the LED, the LED tart glowing thereby dicharging the cell. A 1.5Ω reitor wa choen to be ued along with one diode (BA159) and one LED. The ultracapacitor hardware i hown in the Fig. 5 Fig. 5. A. Power Circuit Hardware of 12 erie ultracapacitor and balancing network. III. HARDWARE DESIGN The the bidirectional DC-DC power converter circuit ued i a 240VA bi-directional buck-boot converter. It comprie the choice of witching device, deign of the filter element, witch gate drive circuit, and controller. 1) Power Device Selection: The minimum voltage to which the tack of ultracapacitor can be dicharged i determined by the maximum current rating of the ultracapacitor and the power device choen mut carry thi current. The witche elected for thi topology were IRF540N, the blocking voltage and current rating of which are 100V and 33A repectively. External anti-parallel diode are not ued with the MOSFET, the body diode of thee device are made ue of. 2) Gate Drive Circuit: The driver circuit for the MOSFET conit of an optocoupler IC HCPL3101 to iolate the control circuit from the power circuit and IR2110 which i the driver with eparate high and low ide referenced output channel. 3) Filter Inductor and Capacitor Selection: The witching frequency i choen a 100kHz. The inductor i deigned for a current ripple of 0.2A a follow V = L di (8) dt di i the current ripple of 0.2A. dt i the on/off time of the witch. The value of V i choen uch that the product V*d i maximum. Thi occur at the minimum value of the ultracapacitor voltage. The required inductance i calculated a 300µH. The filter capacitor i choen depending on the voltage ripple which i choen to be le than 0.1%. The capacitance i calculated to be 5000µF. Hence five 1000µF, 63V Electrolytic capacitor are choen with a 1µF, 63V high frequency polytrene capacitor. A +12V, 3A power upply IC, LM-2576 from National Semiconductor, i ued to power the gate drive circuit and the control and ening circuit. B. Current and Voltage Sening Circuit To perform the controller action, all the voltage and current hould be converted into the proceor voltage range, here thi being 5V. For thi purpoe, a LM-324 quad Op-amp baed current and voltage ening circuit wa deigned. The power for the LM-324 i fed through the LM 2576 power upply IC. Hence the op-amp power upply terminal are +12V and Ground. Negative potential cannot be repreented. The output of thee card are fed to the ADC pin of the proceor through an anti-aliaing filter circuit with a cut off frequency le than 1kHz. The two voltage, DC bu voltage and ultracapacitor voltage are ened and are tepped down by a magnitude of 10 uing a non-inverting amplifier circuit. The current i ened through a current ene reitor of value 0.1Ω. A capacitor i ued in parallel with the reitor, the reultant time contant being very le than the witching time of the converter. The current ening part i ued to produce a voltage a per the equation V Oadc = (0.167 I) (9) Equation 9 i ued to produce a output of 5V for a maximum current of 15A and 0V for a maximum negative current of -15A. IV. CONTROLLER DESIGN The control tructure adopted i the normal two loop hierarchical control: outer voltage loop and the inner current loop The controller are deigned baed on the mall-ignal analyi.

4 16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, Fig. 6. Cloed loop control tructure of the bi-directional DC-DC converter. A. Buck Converter Controller for Charging Ultracapacitor The control tructure adopted for charging ultracapacitor i the ame a hown in Fig. 6. The bandwidth of the inner current loop i choen a 10krad/ec. 1) Inner Current Loop: ĝ() = î() d() = V g C LC 2 + L R + 1 Here the charging wa done at Vg = 10V, C = 12.5F, L = 300µH, R = 0.2Ω. Where, R i the total ESR of the Ultracapacitor tack obtained by meaurement made on a per cell bai uing a network analyer. ĝ() = î() d() = (10) 16 The PI controller ued to achieve the control objective i ĥ() = d() ê i () = (11) 2) Outer Voltage Loop: In thi cae the outer voltage loop controller can be jut a proportional controller. The mall ignal tranfer function of voltage to current i given by î() = 1 C î() = (12) The voltage loop P controller i choen for a bandwidth of 1000 rad/ec. The tranfer function of the P controller ued i ĥ() = îref () ê v () B. Boot Converter Controller = (13) The boot converter control tructure implemented i jut a voltage loop control. If inductor current ha to be limited then an inner current loop i required. Here, in addition to a PI controller, a lead compenator i ued to improve phae margin at the gain cro over frequency. The voltage to control tranfer function i given by d() = L V g 1 R(1 D) 2 R(1 D) 2 L R(1 D) + LC 2 (1 D) 2 2 In the experiment done, the value ued were C=5000µF, V g =15V, V o =24V, L=300µH, R=20Ω, D=0.375 The tranfer function i calculated to be d() = (14) ĥ() = d() ê v () = (15) ê v () in (15) i the voltage error which i given by the difference in the voltage between the et reference value through the proceor and the ened value from the ytem. The boot converter controller i deigned to achieve a bandwidth of 6000rad/ec. Both the controller are implemented digitally uing dpic30f2023 proceor which ha four pair of PWM channel of which two channel have been made ue of for pule generation. The ened voltage and current are fed to ix analog channel, with each ignal given to two channel. V. EXPERIMENTAL RESULTS A. Buck Converter Reult - Charging of Ultracapacitor The following decribe the waveform captured on the cope in the buck mode of operation of the bidirectional DC-DC converter. 1) Blue Waveform DC bu voltage 2) Red Waveform Ultracapacitor voltage 3) Brown Waveform Ultracapacitor current 1) Charging at 1A: The input voltage wa kept fixed at 24V. The charging wa done with a charging current reference of 1A. The cope waveform how the ultracapacitor bank getting charged from 7V to 23V in almot 175ec. Thi i validated below. For an ultracapacitor current of 1A, output from ening circuit hould be 2.67V which can be een on cope. Fig. 7 how the charging at 1A. Fig. 7. Charging of the ultracapacitor bank at the rate of 1A. I = C dv dt (16) I adc = ( ) = 2.67V (17) t = dv C I = (23 7) = 200 (18)

5 16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, ) Charging at 2A: The input voltage wa kept fixed at 24V. The charging wa done with a charging current reference of 2A. The cope waveform how the capacitor getting charged from 4V to 23V in almot 90ec. For an ultracapacitor current of 2A, output from ening circuit hould be 2.83V which can be een on cope. Fig. 8 how the charging at 2A. voltage level which ha been et a 15V. Thi i een by the blue waveform tarting to follow the ultracapacitor voltage after the 50ec period. Fig. 10. Boot mode operation of the bidirectional DC-DC converter with 50W load. Fig. 8. Charging of the ultracapacitor bank at the rate of 2A. I = 2A (19) I adc = ( ) = 2.83V (20) t = dv C 12.5 = (23 4) = 125 (21) I 2 B. Boot Converter Reult - Dicharging of Ultracapacitor The following decribe the waveform captured on the cope in the boot operation 1) Blue Waveform Ultracapacitor voltage 2) Red Waveform DC bu voltage 2) Boot Converter Operation with 50W (23V, 10Ω) load: The Fig. 10 how the dicharge profile of ultracapacitor under a 50W (23V, 10Ω) load. It can be een that the dicharge take place for almot 25ec, after which the PWM i turned off becaue the ultracapacitor ha dichared to it minimum voltage level which ha been et a 15V. C. Integrated Operation of Buck and Boot converter The following decribe the waveform captured on the cope in the integrated operation of the converter 1) Blue Waveform Ultracapacitor voltage 2) Red Waveform DC bu voltage The integrated operation i about creating the effect of voltage ag at the terminal of the ultracapacitor-converter and the load by witching off the power upply and letting the ultracapacitor dicharge and the power upply would be turned on, whence the capacitor tart charging once again. Fig. 11 Fig. 9. Boot mode operation with 25W load. 1) Boot Converter Operation with 25W (23V, 20Ω) load: The Fig. 9 how the dicharge profile of ultracapacitor under a 25W (23V, 20Ω) load. It can be een that the dicharge take place for almot 50ec, after which the PWM i turned off becaue the ultracapacitor ha dichared to it minimum Fig. 11. Integrated bidirectional power flow mode of operation at 75W (23V, 7Ω.) how the integrated operation of the ride through ytem with

6 16th NATIONAL POWER SYSTEMS CONFERENCE, 15th-17th DECEMBER, a 75W load. It can be een that the voltage outage i detected almot intantaneouly and the boot converter operate for almot 9. After 9, the ultracapacitor ha dicharged to the minimum voltage limit at which the PWM i turned off and thereafter the DC bu voltage tart drooping. The Fig. 12 how two capacitor dicharge and charge cycle. [4] Camara et al, Deign and New Control of DC/DC converter to Share Energy Between Supercapacitor and Batterie in Hybrid Vehicle, IEEE tranaction in Vehicular Technology, Vol.57, no. 5, September 2008, Page [5] Bullard et al, Operating principle of the Ultracapacitor, IEEE tranaction on Magnetic, Vol.25, no. 1, January 1989, Page [6] Robert W. Erickon and Dragan Makimovic, Fundamental of Power Electronic, II edition, Springer India Academic Publiher, [7] Ragone plot, [8] IRF540N dataheet,international Rectifier, [9] HCPL-3101 dataheet, Avago Technologie, [10] dpic30f Family Reference manual, [11] IR2110 dataheet,international Rectifier Fig. 12. Integrated charge and dicharge operation for two equential charge and dicharge cycle. VI. CONCLUSION The deign of an ultracapacitor baed power upply for a ytem controller ride through application i explained. The teting of the ride through power upply wa done uccefully with the tet carried out at three different loading mode allowing the ultracapacitor to feed the load during blackout and charging back to the et reference during the preence of main power. The controller deign ha been explained and tet indicate the eamle operation of the controller in the variou operating mode. The back up duration offered by the power upply for variou TABLE I RIDE THROUGH SYSTEM RESULTS. Load 25W 50W 75W Backup Period load i hown in table I. It i een that for 75W load the backup i almot 9ec that nearly meet the objective of the deign. REFERENCES [1] Ultracapacitor Application note, dataheet and cae tudie, Maxwell Ultracapacitor, [2] Kelly et al, Voltage regulator for contactor ride through,ieee tranaction on Indutry Application, Volume 36, NO.2, March/April 2000, Page [3] Sarmiento and Etrada, A Voltage Sag tudy in an Indutry with Adjutable Speed Drive, IEEE indutry application magazine, January/February 1996.

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