CAT24C01, CAT24C02, CAT24C04, CAT24C08, CAT24C16. 1-Kb, 2-Kb, 4-Kb, 8-Kb and 16-Kb I 2 C CMOS Serial EEPROM

Transcription

1 2401, 2402, 2404, 2408, , 2-, 4-, 8- and 16- I 2 MO rial PROM scription h 2401/02/04/08/16 ar 1, 2, 4, 8 and 16 rspctivly MO rial PROM dvics organizd intrnally as 8/16/32/64 and 128 pags rspctivly of 16 yts ach. ll dvics support oth th tandard (100 khz) as wll as Fast (400 khz) I 2 protocol. ata is writtn y providing a starting addrss, thn loading 1 to 16 contiguous yts into a Pag Writ Buffr, and thn writing all data to non volatil mmory in on intrnal writ cycl. ata is rad y providing a starting addrss and thn shifting out data srially whil automatically incrmnting th intrnal addrss count. xtrnal addrss pins mak it possil to addrss up to ight 2401 or 2402, four 2404, two 2408 and on 2416 dvic on th sam us. Faturs upports tandard and Fast I 2 Protocol 1.7 V to 5.5 V upply Voltag Rang 16 Byt Pag Writ Buffr Hardwar Writ Protction for ntir Mmory chmitt riggrs and Nois upprssion Filtrs on I 2 Bus Inputs (L and ) Low powr MO chnology Mor than 1,000,000 Program/ras ycls 100 Yar ata Rtntion Industrial and xtndd mpratur Rang hs vics ar P Fr, Halogn Fr/BFR Fr and ar RoH ompliant PIP 8 L UFFIX 646 MOP 8 Z UFFIX 846 OP 8 Y UFFIX 948L WLP 4** 4 UFFIX 567 L 1 V PIN ONFIGURION O 23 () (op Viw) 2 3 V OI 8 W UFFIX 751B O 23 UFFIX 419 FN 8* VP2 UFFIX 511 WP V PIP (L), OI (W), OP (Y), MOP (Z), FN, (VP2)*, UFN P (HU4) (op Viw) / 08 / 04 / 02 / 01 N / N / N / 0 / 0 N / N / 1 / 1 / 1 N / 2 / 2 / 2 / 2 UFN8 P HU4 UFFIX 517Z WLP 5** 5 UFFIX 567 * h FN (VP2) packag is not rcommndd for nw dsigns V WP L WLP 4** (Bottom Viws) WLP 5** = WP B B = L B = = V = V ** WLP ar availal for th 2404, 2408 and 2416 only. For availaility, plas contact factory. ORRING INFORMION dtaild ordring and shipping information in th packag dimnsions sction on pag 18 of this data sht. miconductor omponnts Industris, LL, 2012 Jun, 2012 Rv Pulication Ordr Numr: 2401/

2 2401, 2402, 2404, 2408, 2416 V L 2, 1, 0 24xx WP V Figur 1. Functional ymol al 1. PIN FUNION Pin Nam Function 0, 1, 2 vic ddrss Input L WP V V N rial ata Input/Output rial lock Input Writ Protct Input Powr upply Ground No onnct h xposd pad for th FN/UFN packags can lft floating or connctd to Ground. al 2. BOLU MXIMUM RING Paramtrs Ratings Units torag mpratur 65 to +150 Voltag on any pin with rspct to Ground (Not 1) 0.5 to +6.5 V trsss xcding Maximum Ratings may damag th dvic. Maximum Ratings ar strss ratings only. Functional opration aov th Rcommndd Oprating onditions is not implid. xtndd xposur to strsss aov th Rcommndd Oprating onditions may affct dvic rliaility. 1. uring input transitions, voltag undrshoot on any pin should not xcd 1 V for mor than 20 ns. Voltag ovrshoot on pins 0, 1, 2 and WP should not xcd V + 1 V for mor than 20 ns, whil voltag on th I 2 us pins, L and, should not xcd th asolut maximum ratings, irrspctiv of V. al 3. RLIBILIY HRRII (Not 2) ymol Paramtr Min Units N N (Not 3) nduranc 1,000,000 Program / ras ycls R ata Rtntion 100 Yars 2. hs paramtrs ar tstd initially and aftr a dsign or procss chang that affcts th paramtr according to appropriat Q100 and J tst mthods. 3. Pag Mod, V = 5 V, 25. al 4... OPRING HRRII (V = 1.8 V to 5.5 V, = 40 to +125 and V = 1.7 V to 5.5 V, = 40 to +85, unlss othrwis spcifid.) ymol Paramtr st onditions Min Max Units I R Rad urrnt Rad, f L = 400 khz 1 m I W Writ urrnt Writ, f L = 400 khz 2 m I B tandy urrnt ll I/O Pins at GN or V = 40 to +85 V 3.3 V 1 = 40 to +85 V > 3.3 V 3 = 40 to I L I/O Pin Lakag Pin at GN or V 2 V IL Input Low Voltag x V V V IH Input High Voltag 0, 1, 2 and WP 0.7 x V V V L and 0.7 x V 5.5 V OL Output Low Voltag V > 2.5 V, I OL = 3 m 0.4 V < 2.5 V, I OL = 1 m 0.2 2

3 2401, 2402, 2404, 2408, 2416 al 5. PIN IMPN HRRII (V = 1.8 V to 5.5 V, = 40 to +125 and V = 1.7 V to 5.5 V, = 40 to +85, unlss othrwis spcifid.) ymol Paramtr onditions Max Units IN (Not 4) Pin apacitanc V IN = 0 V, f = 1.0 MHz, V = 5.0 V 8 pf Othr Pins 6 pf I WP (Not 5) WP Input urrnt V IN < V IH, V = 5.5 V 130 I (Not 5) ddrss Input urrnt (0, 1, 2) Product Rv H: 2402 Product Rv : 2404, 2408, 2416 V IN < V IH, V = 3.3 V 120 V IN < V IH, V = 1.7 V 80 V IN > V IH 2 V IN < V IH, V = 5.5 V 50 V IN < V IH, V = 3.3 V 35 V IN < V IH, V = 1.7 V 25 V IN > V IH 2 4. hs paramtrs ar tstd initially and aftr a dsign or procss chang that affcts th paramtr according to appropriat Q100 and J tst mthods. 5. Whn not drivn, th WP, 0, 1 and 2 pins ar pulld down to GN intrnally. For improvd nois immunity, th intrnal pull down is rlativly strong; thrfor th xtrnal drivr must al to supply th pull down currnt whn attmpting to driv th input HIGH. o consrv powr, as th input lvl xcds th trip point of th MO input uffr (~ 0.5 x V), th strong pull down rvrts to a wak currnt sourc. al 6... HRRII (Not 6) (V = 1.8 V to 5.5 V, = 40 to +125 and V = 1.7 V to 5.5 V, = 40 to +85, unlss othrwis spcifid.) ymol Paramtr tandard Fast Min Max Min Max F L lock Frquncy khz t H: R ondition Hold im s t LOW Low Priod of L lock s t HIGH High Priod of L lock s t U: R ondition tup im s t H: ata In Hold im 0 0 s t U: ata In tup im ns t R and L Ris im ns t F (Not 6) and L Fall im ns t U:O OP ondition tup im s t BUF Bus Fr im Btwn OP and R s t L Low to ata Out Valid s t H ata Out Hold im ns i (Not 6) Nois Puls Filtrd at L and Inputs ns t U:WP WP tup im 0 0 s t H:WP WP Hold im s t WR Writ ycl im 5 5 ms t PU (Nots 7, 8) Powr up to Rady Mod 1 1 ms 6. st conditions according to st onditions tal. 7. std initially and aftr a dsign or procss chang that affcts this paramtr. 8. t PU is th dlay twn th tim V is stal and th dvic is rady to accpt commands. Units 3

4 2401, 2402, 2404, 2408, 2416 al 7... ONIION Input riv Lvls Input Ris and Fall im Input Rfrnc Lvls Output Rfrnc Lvl Output st Load 0.2 x V to 0.8 x V 50 ns 0.3 x V, 0.7 x V 0.5 x V urrnt ourc I OL = 3 m (V 2.5 V); I OL = 1 m (V < 2.5 V); L = 100 pf Powr On Rst (POR) ach 24xx* incorporats Powr On Rst (POR) circuitry which protcts th intrnal logic against powring up in th wrong stat. 24xx dvic will powr up into tandy mod aftr V xcds th POR triggr lvl and will powr down into Rst mod whn V drops low th POR triggr lvl. his i dirctional POR fatur protcts th dvic against rown out failur following a tmporary loss of powr. *For common faturs, th 2401/02/04/08/16 will rfrrd to as 24xx. Pin scription L: h rial lock input pin accpts th rial lock gnratd y th Mastr. : h rial ata I/O pin rcivs input data and transmits data stord in PROM. In transmit mod, this pin is opn drain. ata is acquird on th positiv dg, and is dlivrd on th ngativ dg of L. 0, 1 and 2: h ddrss inputs st th dvic addrss whn cascading multipl dvics. Whn not drivn, ths pins ar pulld LOW intrnally. WP: h Writ Protct input pin inhiits all writ oprations, whn pulld HIGH. Whn not drivn, this pin is pulld LOW intrnally. Functional scription h 24xx supports th Intr Intgratd ircuit (I 2 ) Bus data transmission protocol, which dfins a dvic that snds data to th us as a transmittr and a dvic rciving data as a rcivr. ata flow is controlld y a Mastr dvic, which gnrats th srial clock and all R and OP conditions. h 24xx acts as a lav dvic. Mastr and lav altrnat as ithr transmittr or rcivr. I 2 Bus Protocol h I 2 us consists of two wirs, L and. h two wirs ar connctd to th V supply via pull up rsistors. Mastr and lav dvics connct to th 2 wir us via thir rspctiv L and pins. h transmitting dvic pulls down th lin to transmit a 0 and rlass it to transmit a 1. ata transfr may initiatd only whn th us is not usy (s haractristics). uring data transfr, th lin must rmain stal whil th L lin is high. n transition whil L is high will intrprtd as a R or OP condition (Figur 2). h R condition prcds all commands. It consists of a HIGH to LOW transition on whil L is HIGH. h R acts as a wak up call to all rcivrs. snt a R, a lav will not rspond to commands. h OP condition complts all commands. It consists of a LOW to HIGH transition on whil L is HIGH. vic ddrssing h Mastr initiats data transfr y crating a R condition on th us. h Mastr thn roadcasts an 8 it srial lav addrss. For normal Rad/Writ oprations, th first 4 its of th lav addrss ar fixd at 1010 (h). h nxt 3 its ar usd as programmal addrss its whn cascading multipl dvics and/or as intrnal addrss its. h last it of th slav addrss, R/W, spcifis whthr a Rad (1) or Writ (0) opration is to prformd. h 3 addrss spac xtnsion its ar assignd as illustratd in Figur 3. 2, 1 and 0 must match th stat of th xtrnal addrss pins, and a 10, a 9 and a 8 ar intrnal addrss its. cknowldg ftr procssing th lav addrss, th lav rsponds with an acknowldg () y pulling down th lin during th 9th clock cycl (Figur 4). h lav will also acknowldg th addrss yt and vry data yt prsntd in Writ mod. In Rad mod th lav shifts out a data yt, and thn rlass th lin during th 9 th clock cycl. s long as th Mastr acknowldgs th data, th lav will continu transmitting. h Mastr trminats th sssion y not acknowldging th last data yt (No) and y issuing a OP condition. Bus timing is illustratd in Figur 5. 4

5 2401, 2402, 2404, 2408, 2416 L R ONIION OP ONIION Figur 2. tart/top iming R/W 2401 and a 8 R/W a 9 a 8 R/W a 10 a 9 a 8 R/W 2416 Figur 3. lav ddrss Bits L FROM MR BU RL LY (RNMIR) BU RL LY (RIVR) OUPU FROM RNMIR OUPU FROM RIVR R LY ( t ) Figur 4. cknowldg iming UP ( t U: ) t F t HIGH t R t LOW t LOW L t U: t H: t H: t U: t U:O IN t t H t BUF OU Figur 5. Bus iming 5

6 2401, 2402, 2404, 2408, 2416 WRI OPRION Byt Writ In Byt Writ mod, th Mastr snds th R condition and th lav addrss with th R/W it st to zro to th lav. ftr th lav gnrats an acknowldg, th Mastr snds th yt addrss that is to writtn into th addrss pointr of th 24xx. ftr rciving anothr acknowldg from th lav, th Mastr transmits th data yt to writtn into th addrssd mmory location. h 24xx dvic will acknowldg th data yt and th Mastr gnrats th OP condition, at which tim th dvic gins its intrnal Writ cycl to nonvolatil mmory (Figur 6). Whil this intrnal cycl is in progrss (t WR ), th output will tri statd and th 24xx will not rspond to any rqust from th Mastr dvic (Figur 7). Pag Writ h 24xx writs up to 16 yts of data in a singl writ cycl, using th Pag Writ opration (Figur 8). h Pag Writ opration is initiatd in th sam mannr as th Byt Writ opration, howvr instad of trminating aftr th data yt is transmittd, th Mastr is allowd to snd up to fiftn additional yts. ftr ach yt has n transmittd th 24xx will rspond with an acknowldg and intrnally incrmnts th four low ordr addrss its. h high ordr its that dfin th pag addrss rmain unchangd. If th Mastr transmits mor than sixtn yts prior to snding th OP condition, th addrss countr wraps around to th ginning of pag and prviously transmittd data will ovrwrittn. Onc all sixtn yts ar rcivd and th OP condition has n snt y th Mastr, th intrnal Writ cycl gins. t this point all rcivd data is writtn to th 24xx in a singl writ cycl. cknowldg Polling h acknowldg () polling routin can usd to tak advantag of th typical writ cycl tim. Onc th stop condition is issud to indicat th nd of th host s writ opration, th 24xx initiats th intrnal writ cycl. h polling can initiatd immdiatly. his involvs issuing th start condition followd y th slav addrss for a writ opration. If th 24xx is still usy with th writ opration, No will rturnd. If th 24xx has compltd th intrnal writ opration, an will rturnd and th host can thn procd with th nxt rad or writ opration. Hardwar Writ Protction With th WP pin hld HIGH, th ntir mmory is protctd against Writ oprations. If th WP pin is lft floating or is groundd, it has no impact on th opration of th 24xx. h stat of th WP pin is strod on th last falling dg of L immdiatly prcding th first data yt (Figur 9). If th WP pin is HIGH during th stro intrval, th 24xx will not acknowldg th data yt and th Writ rqust will rjctd. livry tat h 24xx is shippd rasd, i.., all yts ar FFh. BU IVIY: MR R LV R R a 7 a 0 d 7 d 0 O P P LV * For th 2401 a 7 = 0 Figur 6. Byt Writ qunc 6

7 2401, 2402, 2404, 2408, 2416 L 8th Bit Byt n t WR OP ONIION Figur 7. Writ ycl iming R ONIION R BU IVIY: MR R LV R R n n+1 n+p O P P LV n = 1 P 15 Figur 8. Pag Writ qunc R L a 7 a 0 d 7 d 0 t U:WP WP t H:WP Figur 9. WP iming 7

8 2401, 2402, 2404, 2408, 2416 Immdiat Rad Upon rciving a lav addrss with th R/W it st to 1, th 24xx will intrprt this as a rqust for data rsiding at th currnt yt addrss in mmory. h 24xx will acknowldg th lav addrss, will immdiatly shift out th data rsiding at th currnt addrss, and will thn wait for th Mastr to rspond. If th Mastr dos not acknowldg th data (No) and thn follows up with a OP condition (Figur 10), th 24xx rturns to tandy mod. lctiv Rad lctiv Rad oprations allow th Mastr dvic to slct at random any mmory location for a rad opration. h Mastr dvic first prforms a dummy writ opration y snding th R condition, slav addrss and yt addrss of th location it wishs to rad. ftr th R OPRION 24xx acknowldgs th yt addrss, th Mastr dvic rsnds th R condition and th slav addrss, this tim with th R/W it st to on. h 24xx thn rsponds with its acknowldg and snds th rqustd data yt. h Mastr dvic dos not acknowldg th data (No) ut will gnrat a OP condition (Figur 11). quntial Rad If during a Rad sssion, th Mastr acknowldgs th 1 st data yt, thn th 24xx will continu transmitting data rsiding at susqunt locations until th Mastr rsponds with a No, followd y a OP (Figur 12). In contrast to Pag Writ, during quntial Rad th addrss count will automatically incrmnt to and thn wrap around at nd of mmory (rathr than nd of pag). In th 2401, th intrnal addrss count will not wrap around at th nd of th 128 yt mmory spac. BU IVIY: N O MR R LV R OP P LV L 8 9 8th Bit OU NO Figur 10. Immdiat Rad qunc and iming OP BU IVIY: MR R LV R R R LV R N O O P P BU IVIY: LV Figur 11. lctiv Rad qunc N O MR LV R O P P LV n n+1 n+2 n+x Figur 12. quntial Rad qunc 8

9 2401, 2402, 2404, 2408, 2416 PG IMNION PIP 8, 300 mils 646 IU YMBOL MIN NOM MX PIN # 1 INIFIION c B B L OP VIW 2 1 L 2 c B I VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. (2) omplis with J M

10 2401, 2402, 2404, 2408, 2416 PG IMNION OI 8, 150 mils 751B IU O YMBOL MIN NOM MX c B h PIN # 1 INIFIION L θ 0º 8º OP VIW h 1 θ c L I VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) omplis with J M

11 2401, 2402, 2404, 2408, 2416 PG IMNION OP8, 4.4x3 948L IU O YMBOL MIN NOM MX c B L 1.00 RF L1 θ º 8º OP VIW 2 1 c I VIW 1 L1 N VIW L Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) omplis with J MO

12 2401, 2402, 2404, 2408, 2416 PG IMNION MOP 8, 3x3 846 IU O YMBOL MIN NOM MX c B L L RF L2 θ 0.25 B 0º 6º OP VIW 2 IL 1 c I VIW N VIW L2 Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) omplis with J MO-187. IL L1 L 12

13 2401, 2402, 2404, 2408, 2416 PG IMNION FN8, 2x3 511 IU 2 PIN#1 INIFIION PIN#1 INX R 1 2 L OP VIW I VIW BOOM VIW YMBOL MIN NOM MX RF FRON VIW YP L Nots: (1) ll dimnsions ar in millimtrs. (2) omplis with J MO

14 2401, 2402, 2404, 2408, 2416 PG IMNION O 23, 5 L 419 IU O YMBOL 1 MIN NOM MX c B 2.80 B B 0.95 YP L L RF L B OP VIW θ 0º 8º 2 1 L1 L c L2 I VIW N VIW Nots: (1) ll dimnsions ar in millimtrs. ngls in dgrs. (2) omplis with J MO

15 2401, 2402, 2404, 2408, 2416 PG IMNION UFN8, 2x3 XN P 517Z IU O L P IZ 1.8 x PIN #1 INIFIION PIN #1 INX R 1 2 OP VIW I VIW BOOM VIW YMBOL MIN NOM MX RF RF IL FRON VIW RF L Nots: (1) ll dimnsions ar in millimtrs. (2) Rfr J MO-236/MO IL RF oppr xposd 15

16 2401, 2402, 2404, 2408, 2416 PG IMNION WLP4, 0.86x IU B NO 5 PIN 1 RFRN 2X 2X NO X 0.10 M B B È B OP VIW 1 I VIW 1 2 BOOM VIW 2 ING PLN NO PIH NO: 1. IMNIONING N OLRNING PR M Y14.5M, ONROLLING IMNION: MILLIMR. 3. UM, H ING PLN, I FIN BY H PHRIL ROWN OF H ON BLL. 4. OPLNRIY PPLI O PHRIL ROWN OF H ON BLL. 5. IMNION I MUR H MXIMUM ON BLL IMR PRLLL O UM. MILLIMR IM MIN MX RF B 0.84 B 0.40 B ROMMN OLRING FOOPRIN* 1 PG OULIN 4X PIH IMNION: MILLIMR *For additional information on our P Fr stratgy and soldring dtails, plas download th ON miconductor oldring and Mounting chniqus Rfrnc Manual, OLRRM/. 16

17 2401, 2402, 2404, 2408, 2416 PG IMNION WLP5, 0.84x IU PIN 1 RFRN 2X 2X NO ÈÈ B OP VIW 1 I VIW 2 ING PLN NO 3 NO: 1. IMNIONING N OLRNING PR M Y14.5M, ONROLLING IMNION: MILLIMR. 3. UM, H ING PLN, I FIN BY H PHRIL ROWN OF H ON BLL. 4. OPLNRIY PPLI O PHRIL ROWN OF H ON BLL. 5. IMNION I MUR H MXIMUM ON- BLL IMR PRLLL O UM. MILLIMR IM MIN MX RF B 0.86 B 0.30 B B NO 5 5X 0.10 M B PIN 1 RFRN B 1 2 BOOM VIW 1 ROMMN OLRING FOOPRIN* 1 PG OULIN 0.52 PIH 5X PIH IMNION: MILLIMR *For additional information on our P Fr stratgy and soldring dtails, plas download th ON miconductor oldring and Mounting chniqus Rfrnc Manual, OLRRM/. 17

18 Ordring Information 2401 Ordring Information vic Ordr Numr 2401, 2402, 2404, 2408, 2416 pcific vic Marking Packag yp mpratur Rang (Not 9) Lad Finish hipping 2401I G3 MM O 23 5 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2401VP2I G3* FN 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2401WI G3 2401WI OI 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2401W G3 2401WI OI 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2401YI G3 01 OP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2401Y G3 01 OP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2401ZI G3 BM MOP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402 Ordring Information (Not 10) vic Ordr Numr pcific vic Marking Packag yp mpratur Rang (Not 9) Lad Finish hipping 2402WI G 2402WI OI 8 Industrial NiPdu u, 100 Units / u 2402WI G 2402H OI 8 Industrial NiPdu u, 100 Units / u 2402WI G3 2402WI OI 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402WI G3 2402H OI 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402W G3 2402W OI 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402W G3 2402H OI 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402YI G 02 OP 8 Industrial NiPdu u, 100 Units / u 2402YI G 02H OP 8 Industrial NiPdu u, 100 Units / u 2402YI G3 02 OP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402YI G3 02H OP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402Y G3 02 OP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402Y G3 02H OP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402VP2I G3* B FN 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402VP2IG3* 1 FN 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402VP2 G3* B FN 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402VP2G3* 1 FN 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402ZI G3 BML MOP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402Z G3 BML MOP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402ZI G3 1 MOP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402Z G3 1 MOP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402I G3 MN O 23 5 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402 G3 MN O 23 5 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402I G3 1 O 23 5 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402 G3 1 O 23 5 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2402LI G 2402H PIP 8 Industrial NiPdu u, 50 Units / u 2402L G 2402H PIP 8 xtndd NiPdu u, 50 Units / u 2402HU4IG3 1U UFN8 P Industrial NiPdu ap & Rl, 3,000 Units / Rl 2402HU4G3 1U UFN8 P xtndd NiPdu ap & Rl, 3,000 Units / Rl 9. Industrial tmpratur rang is 40 to +85 and xtndd tmpratur rang is 40 to Part numrs nding with for th 2402 ar for Grsham (Product Rv H) only di. * h FN (VP2) packag is not rcommndd for nw dsigns. 18

19 2401, 2402, 2404, 2408, Ordring Information vic Ordr Numr pcific vic Marking Packag yp mpratur Rang (Not 11) Lad Finish hipping 2404WI G 2404 OI 8 Industrial NiPdu u, 100 Units / u 2404WI G OI 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2404W G OI 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2404YI G 04 OP 8 Industrial NiPdu u, 100 Units / u 2404YI G3 04 OP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2404Y G3 04 OP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2404VP2I G3* 2 FN 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2404LI G 2404 PIP 8 Industrial NiPdu u, 50 Units / u 2404L G 2404 PIP 8 xtndd NiPdu u, 50 Units / u 2404ZI G3 2 MOP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2404Z G3 2 MOP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 24044R** 4 WLP 4 Industrial N/ ap & Rl, 5,000 Units / Rl 24045R** 4 WLP 5 Industrial N/ ap & Rl, 5,000 Units / Rl 2404I G3 2 O 23 5 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2404 G3 2 O 23 5 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2404HU4I G3 2U UFN8 P Industrial NiPdu ap & Rl, 3,000 Units / Rl 2404HU4 G3 2U UFN8 P xtndd NiPdu ap & Rl, 3,000 Units / Rl 2408 Ordring Information vic Ordr Numr pcific vic Marking Packag yp mpratur Rang (Not 11) Lad Finish hipping 2408WI G 2408 OI 8 Industrial NiPdu u, 100 Units / u 2408WI G OI 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2408W G OI 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2408YI G 08 OP 8 Industrial NiPdu u, 100 Units / u 2408YI G3 08 OP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2408Y G3 08 OP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2408VP2I G3* 3 FN 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2408VP2 G3* 3 FN 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2408LI G 2408 PIP 8 Industrial NiPdu u, 50 Units / u 2408L G 2408 PIP 8 xtndd NiPdu u, 50 Units / u 2408ZI G3 3 MOP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2408Z G3 3 MOP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 24084R** 8 WLP 4 Industrial N/ ap & Rl, 5,000 Units / Rl 24085R** 8 WLP 5 Industrial N/ ap & Rl, 5,000 Units / Rl 2408I G3 3 O 23 5 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2408 G3 3 O 23 5 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2408HU4I G3 3U UFN8 P Industrial NiPdu ap & Rl, 3,000 Units / Rl 2408HU4 G3 3U UFN8 P xtndd NiPdu ap & Rl, 3,000 Units / Rl 11. Industrial tmpratur rang is 40 to +85 and xtndd tmpratur rang is 40 to * h FN (VP2) packag is not rcommndd for nw dsigns. ** ontact factory for availaility 19

20 2401, 2402, 2404, 2408, Ordring Information vic Ordr Numr pcific vic Marking Packag yp mpratur Rang (Not 12) Lad Finish hipping 2416WI G 2416 OI 8 Industrial NiPdu u, 100 Units / u 2416WI G OI 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2416W G OI 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2416YI G 16 OP 8 Industrial NiPdu u, 100 Units / u 2416YI G3 16 OP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2416Y G3 16 OP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2416VP2I G3* 4 FN 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2416VP2 G3* 4 FN 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2416LI G 2416 PIP 8 Industrial NiPdu u, 50 Units / u 2416L G 2416 PIP 8 xtndd NiPdu u, 50 Units / u 2416ZI G3 4 MOP 8 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2416Z G3 4 MOP 8 xtndd NiPdu ap & Rl, 3,000 Units / Rl 24164R** 6 WLP 4 Industrial N/ ap & Rl, 5,000 Units / Rl 24165R** 6 WLP 5 Industrial N/ ap & Rl, 5,000 Units / Rl 2416I G3 4 O 23 5 Industrial NiPdu ap & Rl, 3,000 Units / Rl 2416 G3 4 O 23 5 xtndd NiPdu ap & Rl, 3,000 Units / Rl 2416HU4I G3 4U UFN8 P xtndd NiPdu ap & Rl, 3,000 Units / Rl 12. Industrial tmpratur rang is 40 to +85 and xtndd tmpratur rang is 40 to ll packags ar RoH compliant (Lad fr, Halogn fr). 14. For information on tap and rl spcifications, including part orintation and tap sizs, plas rfr to our ap and Rl Packaging pcifications Brochur, BR8011/. 15. For dtaild information and a rakdown of dvic nomnclatur and numring systms, plas s th ON miconductor vic Nomnclatur documnt, N310/, availal at * h FN (VP2) packag is not rcommndd for nw dsigns. ** ontact factory for availaility ON miconductor is licnsd y Philips orporation to carry th I 2 Bus Protocol. ON miconductor and ar rgistrd tradmarks of miconductor omponnts Industris, LL (ILL). ILL owns th rights to a numr of patnts, tradmarks, copyrights, trad scrts, and othr intllctual proprty. listing of ILL s product/patnt covrag may accssd at Marking.pdf. ILL rsrvs th right to mak changs without furthr notic to any products hrin. ILL maks no warranty, rprsntation or guarant rgarding th suitaility of its products for any particular purpos, nor dos ILL assum any liaility arising out of th application or us of any product or circuit, and spcifically disclaims any and all liaility, including without limitation spcial, consquntial or incidntal damags. ypical paramtrs which may providd in ILL data shts and/or spcifications can and do vary in diffrnt applications and actual prformanc may vary ovr tim. ll oprating paramtrs, including ypicals must validatd for ach customr application y customr s tchnical xprts. ILL dos not convy any licns undr its patnt rights nor th rights of othrs. ILL products ar not dsignd, intndd, or authorizd for us as componnts in systms intndd for surgical implant into th ody, or othr applications intndd to support or sustain lif, or for any othr application in which th failur of th ILL product could crat a situation whr prsonal injury or dath may occur. hould Buyr purchas or us ILL products for any such unintndd or unauthorizd application, Buyr shall indmnify and hold ILL and its officrs, mploys, susidiaris, affiliats, and distriutors harmlss against all claims, costs, damags, and xpnss, and rasonal attorny fs arising out of, dirctly or indirctly, any claim of prsonal injury or dath associatd with such unintndd or unauthorizd us, vn if such claim allgs that ILL was nglignt rgarding th dsign or manufactur of th part. ILL is an qual Opportunity/ffirmativ ction mployr. his litratur is sujct to all applical copyright laws and is not for rsal in any mannr. PUBLIION ORRING INFORMION LIRUR FULFILLMN: Litratur istriution ntr for ON miconductor P.O. Box 5163, nvr, olorado U Phon: or oll Fr U/anada Fax: or oll Fr U/anada mail: ordrlit@onsmi.com N. mrican chnical upport: oll Fr U/anada urop, Middl ast and frica chnical upport: Phon: Japan ustomr Focus ntr Phon: ON miconductor Wsit: Ordr Litratur: For additional information, plas contact your local als Rprsntativ 2401/