ARC-H: Adaptive replacement cache management for heterogeneous storage devices

Transcription

1 Journal of Systems Architecture 58 (2012) ARC-H: Adaptive replacement cache management for heterogeneous storage devices Young-Jin Kim, Division of Electrical and Computer Engineering, Ajou University, Suwon, Republic of Korea Jihong Kim, School of Computer Science and Engineering, Seoul National University, Seoul, Republic of Korea

2 Outline Introduction Related Work Proposed Scheme Simulation Conclusions

3 Introduction (1/3) Mobile computing devices require a lot of computing power reliable and fast storage, with a small form-factor 95 times faster 42 times less 3 times lower

4 Introduction (2/3) to use heterogeneous secondary storage devices effectively, an OS needs to be modified to account for the different I/O cost of each device some authors have tried to enhance I/O performance by adjusting the cache partition allocated to each device to deal with varying patterns of workloads and the different I/O costs of heterogeneous devices

5 ARC-H Introduction (3/3) using a simple but robust prediction method based on ghost buffers to manage the valuable blocks within the cache partitions more effectively allowing for the difference in I/O costs of a disk and a flash memory reducing service time by up to 88% compared with existing caching algorithms and also reducing energy consumption by up to 81%

6 Related Work (1/8) GreedyDual evaluates the cost of caching a block by considering locality, miss penalty, and file size to achieve good overall I/O performance ARC employs two LRU lists and replaces cache blocks on the basis of both recency and frequency with the helps of ghost buffers T1 and T2 constitute a real page cache; B1 and B2 are ghost buffers, which maintain historical data that is used to predict hit rates in T1 and T2

7 ARC (Cont.) Related Work (2/8) adjusts cache partitions based on the hit counts of the blocks in the ghost buffers and their sizes LRU MRU B1 T1 T2 B2 LRU If Hit in B1 : LRU B1 T1 T2 B2 c LRU c DAC achieves a higher cache hit rate ( good I/O performance in heterogeneous storage devices) lack of intrinsic mechanism to deal with heterogeneous devices manages cache partitions based on the sequentiality of I/O requests as well as reducing the need for write/erase cycles by the flash memory through a consideration of I/O types See the following example

8 Related Work (3/8) Cache management issues for heterogeneous storage workload-awareness vs. device-awareness mainly a mix of sequential patterns with big and small loops workload-awareness allotting cache blocks to requests with loop or other type is desirable device-awareness a hard disk write is more than 24 times slower than a flash memory write keeping a large number of the block which reside on the disk kept in the page cache will decrease the number of disk accesses, improving the response time

9 Related Work (4/8) illustration of different cache algorithms behaviors

10 Related Work (5/8) workload-aware algorithm: LRU Cache misses Disk Flash cache misses: 11, 124, 19, 20, 130, 131, 12, 120, 10, 121, 122, 18, 19, 124, 125, 20, 129, 15, 120, 10 cache hit rate: 5/25 = 20 %

11 Related Work (6/8) device-aware algorithm give a bigger weight value, called device_weight (is set to 5 here), to blocks from a disk cache misses: 11, 124, 19, 20, 130, 131, 11, 121, 122, 18, 19, 124, 20, 129, 15 cache hit rate: 10/25 = 40 % Cache misses Disk Flash

12 Related Work (7/8) device-aware and workload-aware algorithm besides device_weight, also giving each block another weight, called workload_weight (is set to 5 here), when it receives a hit within the cache if a block is from disk and is hit within the cache, it s weight will increase ! cache misses: 11, 124, 19, 20, 130, 131, 11, 121, 122, 19, 124, 129, 15 cache hit rate: 12/25 = 48 % Cache misses Disk Flash

13 I/O time flash:1 hard disk:35 Related Work (8/8) good I/O performance in a heterogeneous storage system requires the device and the workload characteristics to be taken into account in page cache management however, pervious techniques cannot adjust the cache partitions accurately due to poor estimation of varying workload patterns

14 Proposed Scheme (1/4)

15 Proposed Scheme (2/4) T1: for disk T2: for flash B1,B2: ghost buffer Determine block x s access pattern Initially, the block reference is other reference a reference is categorized as a sequential reference after a given number of consecutive references

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17 Proposed Scheme (4/) Case I Hit in B1 increase T1 by COST_RATIO or B2 / B1 *COST_RATIO COST_RATIO: I/O cost ratio between the hard disk and the flash memory LRU MRU B1 T1 T2 B2 LRU LRU c MRU B1 T1 T2 B2 LRU c Case II Hit in B2 increase T2 by 1 or B2 / B1 Case III All misses fetch the missed block to T1(T2) s MRU according to the device the block belongs to Case IV (& Case V) Hit in T1(T2) move to T1(T2) s MRU

18 method C_SEQ C_RAND C_WRIT E1 C_READ 1 m1 Worth_updateA( ) C_WRIT E2 C_READ 2 m m m Fig. 13. Total service time of LRU and ARC-H with a worth update method varying (a) for the PDA trace (b) for the PMP trace, which are normalized over LRU.

19 Simulation (1/4) Experimental environment Implement ARC-H in a trace-based cache simulator, combined with a multi-device I/O simulator. Latency Device 1.8 MK4004GA H Hard Disk K91208U NAND flash memory Read 22.1 (ms) 36 (μs) Write 22.1 (ms) 288 (μs) Erase N/A 2 (ms) Power (mw) Active Idle Standby 200 N/A Two traces of mobile usage PDA (personal digital assistant) and PMP (portable media player)

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21 Fig. 10. Energy consumptions of LRU, ARC, GD, DAC, and ARC-H when the cache size varies (a) for the PDA trace (b) for the PMP trace, which are normalized to LRU.

22 Simulation (4/4) Varying the size of B1 + B2 by factors of 1/2, 1/4, 1/8, and 1/16 of c, which is fixed to 20Mb. Fig. 12. Total service time of LRU and ARC-H with an upper bound of ghost buffer sizes varying (a) for the PDA trace (b) for the PMP trace, which are normalized to LRU. Even with the ghost buffer size of 1/16 of the page cache, ARC-H still has a service time 87% less than that of LRU.

23 Conclusion The proposed algorithm, ARC-H, uses adaptive management based on ghost buffer, and cache replacement based on worth update with recency, I/O cost per device, and workload patterns. ARC-H seeks to overcome the inability of existing cache replacement techniques to deal with the very different I/O costs of heterogeneous storage devices. The results show that it can reduce the total service time by up to 88% and the energy consumption by up to 81% over existing caching algorithms.