SN54LS377, SN54LS378, SN54LS379, SN74LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE
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1 SN54LS377, SN54LS378, SN54LS379, SN74LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE SDLS167 OCTOBER 1976 REVISED MARCH 1988 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 1988, Texas Instruments Incorporated POST OFFICE BOX DALLAS, TEXAS
2 SN54LS377, SN54LS378, SN54LS379, SN74LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE SDLS167 OCTOBER 1976 REVISED MARCH POST OFFICE BOX DALLAS, TEXAS 75265
3 SN54LS377, SN54LS378, SN54LS379, SN74LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE SDLS167 OCTOBER 1976 REVISED MARCH 1988 POST OFFICE BOX DALLAS, TEXAS
4 SN54LS377, SN54LS378, SN54LS379, SN74LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE SDLS167 OCTOBER 1976 REVISED MARCH POST OFFICE BOX DALLAS, TEXAS 75265
5 PACKAGE OPTION ADDENDUM 17-Mar-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking EA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to EA SNJ54LS378J JM38510/32504BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BRA JM38510/32504BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BRA JM38510/32504BSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BSA JM38510/32504BSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BSA M38510/32504BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BRA M38510/32504BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BRA M38510/32504BSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BSA M38510/32504BSA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 32504BSA SN54LS377J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS377J (4/5) Samples SN54LS377J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS377J SN54LS378J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS378J SN54LS378J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS378J SN54LS379J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS379J SN54LS379J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS379J SN74LS377DW ACTIVE SOIC DW Green (RoHS SN74LS377DW ACTIVE SOIC DW Green (RoHS SN74LS377DWG4 ACTIVE SOIC DW Green (RoHS CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS377 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS377 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS377 Addendum-Page 1
6 PACKAGE OPTION ADDENDUM 17-Mar-2017 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan SN74LS377DWG4 ACTIVE SOIC DW Green (RoHS SN74LS377DWR ACTIVE SOIC DW Green (RoHS SN74LS377DWR ACTIVE SOIC DW Green (RoHS SN74LS377N ACTIVE PDIP N Pb-Free (RoHS) SN74LS377N ACTIVE PDIP N Pb-Free (RoHS) SN74LS377NE4 ACTIVE PDIP N Pb-Free (RoHS) SN74LS377NE4 ACTIVE PDIP N Pb-Free (RoHS) SN74LS377NSR ACTIVE SO NS Green (RoHS SN74LS377NSR ACTIVE SO NS Green (RoHS SN74LS378D ACTIVE SOIC D Green (RoHS SN74LS378D ACTIVE SOIC D Green (RoHS SN74LS378DR ACTIVE SOIC D Green (RoHS SN74LS378DR ACTIVE SOIC D Green (RoHS SN74LS378N ACTIVE PDIP N Pb-Free (RoHS) SN74LS378N ACTIVE PDIP N Pb-Free (RoHS) (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS377 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS377 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS377 CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS377N CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS377N CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS377N CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS377N CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS377 CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS377 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS378 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS378 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS378 CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS378 CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS378N CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS378N SNJ54LS377J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS377J Device Marking (4/5) Samples SNJ54LS377J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS377J SNJ54LS377W ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS377W Addendum-Page 2
7 PACKAGE OPTION ADDENDUM 17-Mar-2017 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking SNJ54LS377W ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS377W (4/5) Samples SNJ54LS378J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to EA SNJ54LS378J SNJ54LS378J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to EA SNJ54LS378J SNJ54LS379FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54LS 379FK SNJ54LS379FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54LS 379FK SNJ54LS379J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS379J SNJ54LS379J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS379J (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS - please check for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS : TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 3
8 PACKAGE OPTION ADDENDUM 17-Mar-2017 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54LS377, SN54LS378, SN74LS377, SN74LS378 : Catalog: SN74LS377, SN74LS378 Military: SN54LS377, SN54LS378 NOTE: Qualified Version Definitions: Catalog - TI's standard catalog product Military - QML certified for Military and Defense Applications Addendum-Page 4
9 PACKAGE MATERIALS INFORMATION 17-Aug-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant SN74LS377DWR SOIC DW Q1 SN74LS377NSR SO NS Q1 SN74LS378DR SOIC D Q1 Pack Materials-Page 1
10 PACKAGE MATERIALS INFORMATION 17-Aug-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LS377DWR SOIC DW SN74LS377NSR SO NS SN74LS378DR SOIC D Pack Materials-Page 2
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17 SCALE DW0020A PACKAGE OUTLINE SOIC mm max height SOIC C TYP 9.97 SEATING PLANE A 1 PIN 1 ID AREA 20 18X C NOTE 3 2X B NOTE X C A B 2.65 MAX 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE DETAIL A TYPICAL /A 05/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side. 5. Reference JEDEC registration MS
18 DW0020A EXAMPLE BOARD LAYOUT SOIC mm max height SOIC 20X (2) SYMM X (0.6) 18X (1.27) SYMM (R 0.05) TYP (9.3) LAND PATTERN EXAMPLE SCALE:6X SOLDER MASK OPENING METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING 0.07 MAX ALL AROUND NON SOLDER MASK DEFINED 0.07 MIN ALL AROUND SOLDER MASK DEFINED SOLDER MASK DETAILS /A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
19 DW0020A EXAMPLE STENCIL DESIGN SOIC mm max height SOIC 20X (0.6) 20X (2) 1 SYMM 20 18X (1.27) SYMM (9.3) SOLDER PASTE EXAMPLE BASED ON mm THICK STENCIL SCALE:6X /A 05/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design.
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SN54LS377, SN54LS378, SN54LS379, SN74LS377, SN74LS378, SN74LS379 OCTAL, HEX, AND QUAD D-TYPE FLIP-FLOPS WITH ENABLE
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