Data Sheet. MGA MHz 1GHz ½ Watt High Linearity Amplifier. Features. Description. Applications. Specifications.

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MGA-3011 150MHz 1GHz ½ Watt High Linearity Amplifier Data Sheet Description Avago Technologies MGA-3011 is a high linearity ½ Watt PA with good OIP3 performance and exceptionally good PAE at p1db

1 MGA MHz 1GHz ½ Watt High Linearity Amplifier Data Sheet Description Avago Technologies MGA-3011 is a high linearity ½ Watt PA with good OIP3 performance and exceptionally good PAE at p1db gain compression point, achieved through the use of Avago Technologies proprietary 0.25um GaAs Enhancement-mode phemt process. The adjustable temperature compensated internal bias circuit allowed the device to be operated at either class A or class AB operation The MGA-3011 is housed inside a standard 1 pin QFN 3X3 package. Applications Class A driver amplifier for GSM/CDMA Base Stations. General purpose gain block. Component Image 1 pins QFN 3x Vg 15 RFgnd 1 Features High linearity and P1dB Built in adjustable temperature compensated internal bias circuitry GaAs E-pHEMT Technology [1] Standard QFN 3X3 package 5V supply Excellent uniformity in product specifications Tape-and-Reel packaging option available MSL-1 and Lead-free High MTTF for base station application Specifications 900MHz; 5V, 202.8mA (typical) 17.0 db Gain 44.1 dbm Output IP dbm Output Power at 1dB gain compression 47.0% PAE at P1dB 2.0 db Noise Figure 3011 YYWW XXXX 12 VDD/ 11 VDD/ Vm 2 Vbias 3 RF in 4 1. Enhancement mode technology employs positive gate voltage, thereby eliminating the need of negative gate voltage associated with conventional depletion mode devices. TOP VIEW BOTTOM VIEW Package marking provides orientation and identification 3011 = Device Part Number YYWW = Work Week and Year of manufacture XXXX = Last 4 digit of Lot number nc = not connected Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 0 V ESD Human Body Model = 300 V Refer to Avago Application Note A004R: Electrostatic Discharge, Damage and Control.

2 Absolute Maximum Rating [1] T A =25 C Symbol Parameter Units Absolute Max. V dd,max Device Voltage, RF output to ground V 5.5 I ds,max Device Drain Current ma 400 V ctrl,max Control Voltage V 5.5 P in,max CW RF Input Power dbm 22 P diss Total Power Dissipation [3] W 2.2 T j, max Junction Temperature C 150 T STG Storage Temperature C -5 to 150 Thermal Resistance [2] jc = 33 C/W (=5, Ids=200mA, Tc=85 C) 1. Operation of this device in excess of any of these limits may cause permanent damage. 2. Thermal resistance measured using Infra-Red measurement technique. 3. This is limited by maximum and Ids. Derate 30.3mW/ C for Tc> 77.5 C. Electrical Specifications [4] T A = 25 C, =5V, Vctrl =5V, RF performance at 900 MHz, measured on demo board (see Fig. 7) unless otherwise specified. Symbol Parameter and Test Condition Units Min. Typ. Max. Ids Quiescent current ma Ictrl Vctrl current ma Gain Gain db OIP3 [5] Output Third Order Intercept Point dbm OP1dB Output Power at 1dB Gain Compression dbm PAE Power Added Efficiency % NF Noise Figure db S11 Input Return Loss, 50Ω source db S22 Output Return Loss, 50Ω load db S12 Reverse Isolation db Measurements at 900MHz obtained using demo board described in Figure and MHz OIP3 test condition: F RF1 - F RF2 = 10MHz with input power of -5dBm per tone measured at worse side band. Use proper biasing, heat sink and de-rating to ensure maximum channel temperature is not exceeded. See absolute maximum ratings and application note (if applicable) for more details. 2

Product Consistency Distribution Charts [1,2] CPK = 2.209 Stdev = 5.12 CPK = 1.45 stdev = 0.28 Figure 1. Ids at 900MHz; LSL=15mA, nominal =202.8mA, USL=240mA Figure 2.

3 Product Consistency Distribution Charts [1,2] CPK = Stdev = 5.12 CPK = 1.45 stdev = 0.28 Figure 1. Ids at 900MHz; LSL=15mA, nominal =202.8mA, USL=240mA Figure 2. OIP3 at 900MHz; LSL=41dB, nominal=44.1dbm CPK = Stdev = stdev =0.187 Figure 3. P1dB at 900MHz; LSL, 2.2dBm, nominal=27.7dbm Figure 4. PAE at P1dB 900MHz; nominal=47.0% CPK =.858 Stdev = Figure 5. Gain at 900MHz; LSL=15.5dB, Nominal =17.0dB, USL=18.5dB, 1. Distribution data sample size is 500 samples taken from 2 different wafer lots and 3 different wafers. Future wafers allocated to this product may have nominal values anywhere between the upper and lower limits. 2. Measurements were made on a characterization test board, which represents a trade-off between optimal OIP3, gain, P1dB and PAE. Circuit trace losses have not been de-embedded from measurements above. 3

4 Demo Board (750MHz to 1GHz) Vctrl C10 C L4 C7 C8 C9 Rbias Vm L3 RFin L1 RFgnd Vg 12 Vbias 2 RFin C1 C C4 C3 C11 L2 Top View Figure. Demo board and application schematic (750MHz to 1GHz) Demo Board Part List Circuit Symbol Size Value Part Number Description L nH LLP1005-FH10 (TOKO) MLC Inductor L nH LLP1005-FHN8C (TOKO) MLC Inductor L nH LL1005-FHL8N2J (TOKO) MLC Inductor L nH MLK1005S15NJ (TDK) MLC Inductor C pf C1005C0G1H00D (TDK) Ceramic Chip Capacitor C pF GRM1555C1H1R8CZ01B (Murata) Ceramic Chip Capacitor C pF GRM1555C1H4R3CZ01B (Murata) Ceramic Chip Capacitor C pF GRM1555C1H5RCZ01B (Murata) Ceramic Chip Capacitor C pF GRM1555C1H101JZ01B (Murata) Ceramic Chip Capacitor C uF GRM155R71E103KA01B (Murata) Ceramic Chip Capacitor C pF GRM1555C1H101JZ01B (Murata) Ceramic Chip Capacitor C uF GRM21BR1E225KA12L (Murata) Ceramic Chip Capacitor C pF GRM1555C1H101JZ01B (Murata) Ceramic Chip Capacitor C pF GRM1555C1H101JZ01B (Murata) Ceramic Chip Capacitor Note: Rbias is used to lower the quiescent current. Default is 0 ohm 4

Figure 7. Demo board Layout Recommended PCB material is 10 mils Rogers RO4350, with FR4 backing for mechanical strength. Suggested component values may vary according to layout and PCB material.

5 Figure 7. Demo board Layout Recommended PCB material is 10 mils Rogers RO4350, with FR4 backing for mechanical strength. Suggested component values may vary according to layout and PCB material. MGA-3011 Typical Performance (750MHz to 1GHz) T A = +25 C, = 5V, Vctrl =5V, Input Signal=CW unless stated otherwise. Ids (ma) Figure 8. Over Temperature Ids vs Frequency 85ºC 25ºC -40ºC OIP3 (db) Figure 9. Over Temperature OIP3 vs Frequency 85ºC 25ºC -40ºC 5

6 MGA-3011 Typical Performance (750MHz to 1GHz) T A = +25 C, = 5V, Vctrl =5V, Input Signal=CW unless stated otherwise. P1dB (dbm) Figure 10. Over Temperature P1dB vs Frequency 85ºC 25ºC -40ºC Gain (db) Figure 11. Over Temperature Gain vs Frequency 85ºC 25ºC -40ºC S11 (db) Figure 12. Over Temperature S11 vs Frequency 85ºC 25ºC -40ºC S22 (db) ºC 25ºC -40ºC Figure 13. Over Temperature S22 vs Frequency S12 (db) Figure 14. Over Temperature S12 vs Frequency 85ºC 25ºC -40ºC ACPR (dbc) GPP WCDMA Test Test Model Model 1+4DPCH +/ - 5MHz Offset Output Channel Power (dbm) Figure 15. Over Temperature ACPR (900MHz) Vs Pout 85ºC 25ºC -40ºC

7 S-Parameter ( = 5V, Vctrl = 5V, T=25 C, unmatched 50 ohm) freq (GHz) S11 (db) S11 (ang) S21 (db) S21 (ang) S12 (db) S12 (ang) S22 (db) S22 (ang) Note: Circuit layout refer to Figure 1. 7

8 S-Parameter Test circuit Vg 1112A Bias Network 45 MHZ-2.5 GHz J1 RFin Vm 1 Vbias 2 RFin 3 4 RFgnd A Bias Network 45 MHZ-2.5 GHz J Vg Reference Plane Reference Plane Top View Figure 1. S-Parameter Test circuit. 8

9 S-Parameter ( = 5V, Vctrl = 5V, T=25 C, unmatched 50 ohm), with L4 = 15nH, C = 100pF freq (GHz) S11 (db) S11 (ang) S21 (db) S21 (ang) S12 (db) S12 (ang) S22 (db) S22 (ang) Note: Circuit layout refer to Figure 17, with L4 = 15 nh, C = 100pF 9

10 S-Parameter ( = 5V, Vctrl = 5V, T=25 C,unmatched 50 ohm), with L4 = 100nH, C = 1nF freq (GHz) S11 (db) S11 (ang) S21 (db) S21 (ang) S12 (db) S12 (ang) S22 (db) S22 (ang) Note: Circuit layout refer to Figure 17, with L4 = 100 nh, C = 1nF 10

11 S-Parameter Test circuit (400MHz 700 MHz) Vctrl L4 = 15nH C10 = 100pF C = 100pF J1 RFin Rbias =0 ohm Vm 1 Vbias 2 RFin 3 4 RFgnd 1 Vg A Bias Network 45 MHZ-2.5 GHz J Reference Plane Reference Plane TOP VIEW Figure 17. S-Parameter Test Circuit. 11

Demo Board (400MHz to 700MHz) Vctrl L4 R2 C7 C5 C C3 C4 R1 Vm 1 1 15 14 L3 J1 RFin L1 L2 J2 RFgnd Vg 12 Vbias 2 RFin 3 4 5 7 8 13 C1 11 10 9 C2 Figure 18.

12 Demo Board (400MHz to 700MHz) Vctrl L4 R2 C7 C5 C C3 C4 R1 Vm L3 J1 RFin L1 L2 J2 RFgnd Vg 12 Vbias 2 RFin C C2 Figure 18. Demo board and application schematic (400MHz to 700 MHz) Demo Board Part List (400MHz to 700MHz) Circuit Symbol Value Part Number C1 10 pf Murata GRM155 series C2 10p Murata GRM155 series C3 1 nf Murata GRM155 series C4 100 nf Murata GRM155 series C5 1 nf Murata GRM155 series C 1 nf Murata GRM155 series C7 1 nf Murata GRM155 series J Johnson edge launch SMA female J Johnson edge launch SMA female L1 22 nh Toko LL1005 series L2 15 nh Toko LL1005 series L3 100 nh Toko LL1005 series L4 100 nh Toko LL1005 series Q1 Mga3011 R1 0 R R2 390 R 12 Top View Figure 19. Demo board Layout for 400MHz to 700MHz 1. Recommended PCB material is 10 mils Rogers RO4350, with FR4 backing for mechanical strength. 2. Suggested component values may vary according to layout and PCB material.

13 MGA-3011 Typical Performance (400MHz to 700MHz) T A = +25 C, = 5V, Vctrl =5V, Input Signal=CW unless stated otherwise. S11(dB) Figure 20. Over Temperature S11 vs Frequency S22(dB) Figure 22. Over Temperature S22 vs Frequency -40 C 25 C 85 C C 25 C 85 C S12(dB) Figure 21. Over Temperature S12 vs Frequency Gain (db) Figure 23. Over Temperature Gain vs Frequency -40 C 25 C 85 C C 25 C 85 C P1dB (db) Figure 24. Over Temperature P1dB vs Frequency -40 C 25 C 85 C OiP3 (db) Figure 25. Over Temperature OIP3 vs Frequency -40 C 25 C 85 C 13

14 PCB Layout and Stencil Design Chamfer Chamfer 0.0 Chamfer PCB Land Pattern (Top View) Stencil Outline All dimensions are in milimeters. Combined PCB & Stencil Layouts Part Number Ordering Information Part Number No. of Devices Container MGA-3011-TR1G Reel MGA-3011-TR2G Reel MGA-3011-BLKG 100 antistatic bag Product Family Output Power Frequency Band 700MHz-1GHz GHz GHz 0.5W MGA-3011 MGA-3021 MGA W ALM ALM ALM W ALM ALM ALM Note: MGA-3011 operates from 400MHz to 1GHz. 14

15 Package Dimensions Pin 1 Dot by marking 3.00 ± Ref 1.55±0.05 Exp.DAP PIN #1 IDENTIFICATION CHAMFER 0.30 X ± ± YYWW 0.50 Bsc 1.55±0.05 Exp.DAP XXXX 1. All dimensions are in milimeters 2. Dimensions are inclusive of plating 3. Dimensions are exclusive of mold flash and metal burr 0.00 ± ± ± Ref. TOP VIEW SIDE VIEW BOTTOM VIEW Device Orientation REEL USER FEED DIRECTION CARRIER TAPE 3011 YYXX XXXX 3011 YYXX XXXX 3011 YYXX XXXX TOP VIEW END VIEW USER FEED DIRECTION COVER TAPE Tape Dimensions 2.0± 0.1 [1] 4.0± 0.1 [2] 1.75± ± ± ± 0.1 [1] C L 3.3± ± ± 0.3 R 0.3 Typical 1.55± ± ± Measured from centerline of sprocket hole to centerline of pocket 2. Cumulative tolerance of 10 sprocket holes is ± All dimensions in millimeter unless otherwise stated 15

16 Reel Dimensions - 7 inch SEE DETAIL "X".25mm EMBOSSED LETTERS LETTERING THICKNESS: 1.mm SLOT HOLE "a" Ø178.0±0.5 SLOT HOLE "b" FRONT BACK PS SLOT HOLE(2x) 180 APART. PS RECYCLE LOGO FRONT VIEW SLOT HOLE "a": 3.0±0.5mm(1x) SLOT HOLE "b": 2.5±0.5mm(1x) R * MIN Ø Ø20.2 MIN. 120 R5.2 FRONT BACK DETAIL "X" 45 Ø55.0±0.5 Ø178.0± DETAIL "Y" (Slot Hole) 1.0 EMBOSSED RIBS RAISED: 0.25mm, WIDTH: 1.25mm BACK VIEW Ø178.0±0.5 Ø51.2±0.3 SEE DETAIL "Y" 18.0* MAX. 1

17 0 2 Reel Dimensions - 13 inch DATE CODE 12MM EMBOSSED LETTERING 1.0mm HEIGHT x MIN. 0.4mm THICK. Ø329.0±1.0 HUB Ø100.0±0.5 PS CPN MPN EMBOSSED LETTERING 7.5mm HEIGHT EMBOSSED LINE (2x) 89.0mm LENGTH LINES 147.0mm AWAY FROM CENTER POINT PS RECYCLE LOGO SEE DETAIL "X" ESD LOGO Ø1.0 FRONT VIEW ** * -0.0 EMBOSSED LETTERING 7.5mm HEIGHT Detail "X" +0.5 Ø (MIN.) 1.5(MIN.) PS Ø100.0±0.5 Ø329.0±1.0 BACK VIEW R19.0±0.5 Ø12.3±0.5(3x) SLOT 5.0±0.5(3x) 18.4 MAX.* For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright Avago Technologies. All rights reserved. AV02-103EN - March 13, 2012

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