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1 Introduction to Computer Engineering EECS dickrp/eecs203/ Instructor: Robert Dick Office: L477 Tech Phone: TA: Neal Oza Office: Tech. Inst. L375 Phone: TT: David Bild Office: Tech. Inst. L470 Phone:
2 Pace, lab expectations Anybody falling behind? If something isn t making sense, stop me and I ll elaborate using the chalkboard I m glad to do it! Lab expectations (lab two and above) Complete schematics Easy to debug, color-coded wiring Terse but clear description 2 R. Dick Introduction to Computer Engineering EECS 203
3 Outline 1. The Quine McCluskey two-level logic minimization method 2. 3 R. Dick Introduction to Computer Engineering EECS 203
4 Review: Minimization techniques Advantages and disadvantages? Algebraic manipulation Karnaugh maps Quine McCluskey Advanced topic: Kernel extraction Advanced topic: Heuristic minimization, e.g., Espresso 4 R. Dick Introduction to Computer Engineering EECS 203
5 Deriving POS Find SOP form for zeros: f = abz + c d + a b d 5 R. Dick Introduction to Computer Engineering EECS 203
6 Deriving POS Apply De Morgan s theorem f = abd + c d + a b d (1) f = abd + c d + a b d (2) f = ( abd ) (c d) (a b d ) (3) f = ( a + b + d ) ( c + d ) ( a + b + d ) (4) Advanced topic: Read the POS expression directly from the Karnaugh map More difficult 6 R. Dick Introduction to Computer Engineering EECS 203
7 Quine McCluskey two-level logic minimization Compute prime implicants with a well-defined algorithm Start from minterms Merge adjacent implicants until further merging impossible Select minimal cover from prime implicants Unate covering problem What is happening? ab + ab = a 7 R. Dick Introduction to Computer Engineering EECS 203
8
9 X
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17 X X X
18 X X001 X
19 X X X X
20 X X001 X X
21 X X001 X X 10X0
22 X X001 X X 10X0
23 X X X X 10X X
24 X X001 X X 10X0 1X01
25 X X X X 10X X X
26 X X001 X X 10X0 1X01 1X10
27 X X001 X X 10X0 1X01 1X10 111X
28 X X001 X X 10X0 1X01 1X10 111X
29 X X001 X X 10X0 1X01 1X10 111X 11X1
30 X X001 X X 10X0 1X01 1X10 111X 11X1
31 X X X X 10X X X X 11X1 X00X
32 X X X X 10X X X X 11X1 X00X
33 X X X X 10X X X X 11X1 X00X X0X0
34 X X X X 10X X X X 11X1 X00X X0X0
35 X X X X 10X X X X 11X1 X00X X0X0
36 X X X X 10X X X X 11X1 X00X X0X0
37 X X X X 10X X X X 11X1 X00X X0X0
38 X X X X 10X X X X 11X1 X00X X0X0
39 Summary Review: Minimization overview Review: Karnaugh map SOP minimization POS using SOP K-map trick Quine-McCluskey optimal two-level minimization method 9 R. Dick Introduction to Computer Engineering EECS 203
40 Next lecture More advanced building blocks Encoders and decoders MUXs Advanced TG techniques 10 R. Dick Introduction to Computer Engineering EECS 203
41 Outline 1. The Quine McCluskey two-level logic minimization method R. Dick Introduction to Computer Engineering EECS 203
42 Reading assignment M. Morris Mano and Charles R. Kime. Logic and Computer Design Fundamentals. Prentice-Hall, NJ, third edition, 2004 Sections Sections Section 4.6 (decoders and multiplexers only) 12 R. Dick Introduction to Computer Engineering EECS 203
43 Additional references If QM doesn t click, please also see the following references Randy H. Katz. Contemporary Logic Design. The Benjamin/Cummings Publishing Company, Inc., 1994: pp John P. Hayes. Introduction to Digital Logic Design. Addison-Wesley, MA, 1993 pp. 320, 321 You can get these from me or the library 13 R. Dick Introduction to Computer Engineering EECS 203
44 Computer geek culture reference 14 R. Dick Introduction to Computer Engineering EECS 203
Introduction to Computer Engineering EECS 203 dickrp/eecs203/
Introduction to Computer Engineering EECS 203 http://ziyang.eecs.northwestern.edu/ dickrp/eecs203/ Instructor: Robert Dick Office: L477 Tech Email: dickrp@northwestern.edu Phone: 847 467 2298 TA: Neal
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