Impact of wind turbine based on double feed induction generator and FACTS devices on power systems

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1 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ 1*, Fatiha LAKDJA ad Fatia Zohra GHERBI 1 1 Egieerig Departet. Itelliget Cotrol ad Electrical Power Syste Laboratory (ICEPS), Djillali Liabes Uiversity, Sidi-Bel-Abbes, 000, Algeria. The Departet of Electrical Egieerig, Saida Uiversity, Egieerig Departet. Itelliget Cotrol ad Electrical Power Syste Laboratory (ICEPS), Djillali Liabes Uiversity, Sidi-Bel-Abbes, 000, Algeria. E-ails: ADJOUDJ-l@hotail.fr; fladja@yahoo.fr; fzgherbi@gail.co * Correspodig author, phoe: Abstract Itegratio of wid turbies ay have sigificat ipacts o power syste operatio ad geeratio of electricity fro wid power has received cosiderable attetio. This paper aalyses the ipact of itegratig wid geeratio based o double feed iductio geerators (DFIG) ad Flexible AC Trasissio Syste (FACTS) o the voltage collapse ad active losses of etwor IEEE 30 bus test. Therefore, we ust choose aog FACTS devices, those with specific applicatios such as aitaiig the voltage at the desired value ad the cotrol of power flow, SVC is the ost effective i the copesatio of reactive as well as aitaiig the voltage, ad TCSC is the best choice for a proper cotrol of power flow ad cosequetly the reductio of active losses. The siulatio results show clearly the effect of wid power plats ad FACTS o the grid, voltage stability ad power quality of electric power syste. Keywords Power syste; Flexible AC Trasissio Syste; Wid power geeratio; Voltage stability; power flow; Power Syste Aalysis Toolbox 97

2 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI Itroductio Wid eergy is becoig oe of the ost iportat reewable eergy sources, with the icrease i the eviroetal awareess ad the passage of eviroetal regulatios; the eviroetal costraits are havig a sigificat ipact o power systes. Maig full use of wid eergy to geerate electricity caot oly reduce the eviroetal pollutio but also reduce the fuel cost of the power syste, which brigs the cosiderable ecooic beefits. Wid eergy is the world s fastest growig reewable eergy source [1]. For aalysig the effect of coectig wid fars o the voltage profile ad the active losses. Flexible AC Trasissio Syste (FACTS) cotrollers are used to ehace the syste flexibility ad icrease syste loadability. These cotrollers are used for ehacig dyaic perforace of power syste. Differet FACTS devices, such as Static Var Copesator (SVC), Thyristor Cotrolled Series Capacitor (TCSC) are aog the ost potetial cotrollers for applicatio to power syste to achieve better cotrollability. SVC essetially cotrols the voltage of a bus i a syste. TCSC essetially cotrols power flow over a lie [4]. Power Syste Aalysis Toolbox (PSAT) is a MATLAB toolbox for both electric power syste aalysis ad cotrol. Power flow, cotiuatio power flow, optial power flow, sall sigal stability aalysis, ad tie-doai siulatio ca be applied i PSAT. The toolbox is also provided with a coplete graphical iterface ad a Siuli based oe-lie etwor editor [5]. Advatage is that this tool offers a easy iterface to siulate power systes, where ost of the copoets of the syste are already odelled. I the tool, there are odels for wid turbies, loads, buses, electrical achies, voltage regulators, etc. [6]. The ai goal of this paper is to ehace the power flow ad resolve the voltage istability with the isertio of wid geeratio ad FACTS devices o power systes. 98

3 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p Material ad ethod Thyristor-cotrolled series copesator (TCSC) TCSC vary the electrical legth of the copesated trasissio lie which eables it to be used to provide fast active power flow regulatio. It also icreases the stability argi of the syste. The sipler TCSC odel exploits the cocept of a variable series reactace. The series reactace is adjusted autoatically, withi liits, to satisfy a specified aout of active power flow through it [7]. The odel of the TCSC used i this paper is a variable reactace coected i series with trasissio lie [8] that is: Z = r + j( x + x ), = (, ) Ω (1) TCSC TCSC The resultig coductace ad susceptace are, respectively: g r = = (, r + x + x ) ( TCSC ) Ω TCSC () b ( x x + TCSC = = (, ) r + ( x + xtcsc ) ) Ω TCSC where Z : Ipedace of eleet ; r : Resistace of eleet ; x : Reactace of eleet ; x TCSC : Maxiu reactace of the TCSC; g : Coductace of eleet ; b : Series susceptace of eleet ; Ω TCSC : uber of lies with TCSCs. The TCSC (Thyristor-Cotrolled Series Capacitor) ca odify the series capacitive reactace of the trasissio lie. Figure 1 shows the siplified diagra of TCSC [9]. (3) Figure 1. Siple diagra of TCSC The TCSC is coposed of a iductace x L i series with a thyristor dier, all i parallel with a capacitor x c. If the thyristors are loced, the TCSC has fixed ipedace which correspods to that 99

4 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI of capacitor. If the thyristors are cotrolled as a electroic switch at full coductio, the TCSC ipedace is equal to the equivalet ipedace of the capacitor i parallel with the iductace [9]. Figure illustrates the odel of TCSC i power flow cocept [10]. The TCSC cotroller is placed betwee two buses ad. The equivalet susceptace B e of the TCSC is fuctio of the firig agle α, the iductace x L ad the capacitor x c. The susceptace is coputed as follow [9]: B e = 1 (( π α) + si α ) x πx c L (4) Figure. Model of TCSC i a power flow (P, Q) are the ijected active ad reactive powers at bus, (P,Q) are the ijected active ad reactive powers at bus. The differet powers are coputed by the followig equatios [10]: P = V V B si( θ θ) e (5) Q K = V V B cos( θ θ ) V e B e Q = V V B cos( θ θ ) V θ = θ + δ t e B e where V : voltage agitude at bus ; V : voltage agitude at bus ; B e : Susceptace;, Buses; θ Phase of terial voltage; δ t Voltage phase; α Firig agle. Static var copesator (SVC) SVC s cosist of covetioal thyristors which have a faster cotrol over the bus voltage ad require ore sophisticated cotrollers copared to the echaical switched covetioal devices. SVC s are shut coected devices capable of geeratig or absorbig reactive power. By havig a cotrolled output of capacitive or iductive curret, they ca 100

5 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p aitai voltage stability at the coected bus [11]. SVC devices ca be odelled as a variable shut susceptace [8,1]. Hece, the reactive power ijected by the SVC at bus is: Q SVC = bsvc V, N (6),, SVC where Q SVC, : Reactive power ijected by the SVC device at bus ; b SVC, : Susceptace of the SVC device at bus ; V : voltage agitude at bus ; N SVC : uber of buses with SVCs. Double feed iductio geerators (DFIG) odel The overall schee for a wid far based o DFIG is depicted i Figure 3. Thus; it is coposed by two voltage fed PWM coverters i bac-to-bac cofiguratio. These coverters allow the decoupled cotrol of the active ad reactive power flow betwee the DFIG ad the AC etwor by adjustig the switchig of the IGBTs. For this structure, the equatios of the double feed iductio geerator i ters of the d ad q axes ad eglectig the stator ad rotor flux trasiets ca be writte as [,13]: For the stator circuit: v = R i + ( x + x ) i + x i (7) ds qs s ds s qs s s qs ds qr v = R i ( x + x ) i + x i (8) For the rotor circuit: dr r dr r dr v = R i + ( 1 ω )(( x + x ) i + x i (9) qr r qr r qr dr qs v = R i + ( 1 ω )(( x + x ) i + x i (10) ds where v ds, v qs : d ad q axes stator voltages; v dr,v qr :d ad q axes rotor voltages; i ds,i qs : d ad q axes stator currets; i dr,i qr d ad q axes rotor currets; R s, R r : Stator ad rotor resistaces; x s : Stator self-reactace; x r : Rotor self-reactace; x : Mutual reactace; ω : Rotor speed. Assuig a lossless coverter odel, active power of the coverter coicides with the rotor active power. The reactive power ijected ito the grid ca be approxiated eglectig stator resistace ad assuig that the d- axis coicides with the axiu of the stator flux. Therefore, the powers ijected i the grid result [14]: P = v i + v i + v i + v i (11) ds ds qs qs dr dr qr qr 101

6 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI xvidr Q = x + x s v x where v is the grid voltage agitude. (1) Figure 3. Variable speed wid turbie with doubly fed iductio geerator Power flow equatios The curret operatig coditio is defied by the active ad reactive power balace at all buses: Φ PG PD = P, N (13) Q G Q D = Φ Q, N (14) where P G : Total active power productio at bus ; P D : Total active power cosuptio at bus ; Q G : Total reactive power productio at bus ; Q D : Total reactive power cosuptio at bus ; P : Active power flow fro bus to bus as a fuctio of the state variables; Q : Reactive power flow fro bus to bus as a fuctio of the state variables; N: set of buses; Φ : set of buses coected to bus. Trasissio lies are odelled by the well-ow equivalet p-circuit. The active ad reactive power flows fro bus to bus are [8,1], respectively: P = V g V V ( g cos( θ θ ) + b si( θ θ )), = (, ) Ω (15) L Q = V ( b + b p ) V V ( g si( θ θ ) cos( θ θ )), = (, ) Ω (16) L 10

7 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p whereθ : Voltage agle at bus ; θ : Voltage agle at bus ; V, : Voltage agitude at bus, ; Ω L : set of trasissio lies; b p : shut susceptace of eleet. Results ad discussio The IEEE 30 Bus Test Case represets a portio of the Aerica Electric Power Syste (i the Midwester US) as of Deceber, The data was idly provided by Iraj Dabbagchi of AEP ad etered i IEEE Coo Data Forat by Rich Christie at the Uiversity of Washigto i August 1993[15]. The IEEE 30 bus test syste is selected for study to icrease the power flow ad to get better the voltage profile of the syste with 100MVA base, 135 KV base ad frequecy as 60Hz. The syste has 34 trasissio lies, 1 load buses, 6 geeratio buses ad fixed capacitors. Syste load is ept costat at 83.4MW ad 16.MVAR. The PSAT odel for IEEE 30 bus syste with base coditios is show i Figure 4. The followig three study cases are addressed here: Case A: ipact of SVC ad TCSC o syste. Case B: ipact of wid turbie o syste. Case C: ipact of wid turbie with FACTS o syste. Figure 4. IEEE 30 bus test syste iserted i PSAT 103

8 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI Case A: ipact of SVC ad TCSC o syste The choice of the optial locatio of SVC is based o deteriatio of the bus with the lowest voltage agitude. The bus is deteried by aalysig the power flow (Newto Raphso ethod). Bus 30 is idicated as the critical voltage bus eedig Q support. The TCSC cotrol powers i the trasissio lies i order to iiize power losses, the idex used i this study for the optial locatio of the TCSC, is to deterie the ost lie causes sigificat losses usig the power flow with Newto Raphso ethod, it is lie betwee bus ad bus 5. The paraeters of FACTS devices used i this paper are as follows: Paraeters of TCSC Power, Voltage ad Frequecy Ratigs [MVA, V, Hz]: [100,135,60]; Model type : Xc; Percetage of series copesatio [%] : 40; Regulator tie costat Tr [s]: 1; Xc_ax ad Xc_i [p.u. p.u.]: [ ]; Proportioal ad Itegral gais Kp ad Ki: [5 1]; Gai for stabilizig sigal Kr [p.u./p.u.]: 10. Paraeters of SVC: Power, Voltage ad Frequecy Ratigs [MVA, V, Hz]: [ ]; Regulator Tie Costat Tr [s]: 10; Regulator Gai Kr [p.u./p.u.]: 100; Referece Voltage [p.u.]: 1; B_ax ad B_i [p.u. p.u.]: [1-1]. After the optial locatio of the SVC was deteried to be at bus 30 ad TCSC to be betwee bus ad bus 5, Voltages profiles of base case ad syste with SVC are illustrated i Figure 5. Losses of real power of base case ad syste with TCSC are show i Figure 6. SVC coected to bus 30 ijected MVAR to aitai the voltage at the desired value. Fro the results of voltage profiles without SVC, buses that are relatively far fro productio uits aely bus 4, 5, 6 ad 30 have lower voltages relative to the others, this is due to the log distace betwee the productio ad cosuptio. Moreover, the istallatio of the SVC at bus 30 ehaces the voltage profile at differet bus. The TCSC is adjusted autoatically ad taes a value of Xc= pu 104

9 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p betwee bus ad 5. Accordig to the results illustrated i Figure 6, TCSC lowers total losses i the syste by MW to the value MW base case With Votage profile (PU) Figure 5. Voltages profiles of test syste with ad without SVC base case with TCSC (Bus ad Bus5) Ploss(MW) 3 1 Figure 6. Active Losses of test syste with ad without TCSC Table 1. Total geeratio, losses ad slac bus productio with ad without FACTS Results Total geeratio Total losses Slac bus productio P [MW] Q[Mvar] P [MW] Q[Mvar] P[MW] Q[Mvar] Base case with TCSC With SVC Case B: ipact of wid far o syste Bus 10 is the ost suitable bus (fixed capacitor Bus) ad accordigly wid far of 600 MVA / 69V capacity coprisig of 300 wid turbies which have bee coected to this bus by creatig aother bus (bus o: 31) through a trasforer of tap ratio uity. Wid was odelled after Weibull distributio as proposed by Milao. F (005) by taig ito accout the coposite ature of wid which icluded average, rap, gust, 105

10 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI turbulece ad low pass filters were used to sooth the wid speed variatios[16]. Paraeters of DFIG ad Wid odel are give i Table. The PSAT odel for IEEE 30 bus test syste with wid turbie is show i Figure 7, the wid speed ad wid power of DFIG are show i Figure 8 ad 9 respectively. The calculatio of the power flow is a stage ecessary to be able to copare the results. It is perfored first for the deteriatio of the iitial coditios of the syste before the isertio of the power wid. Fro Table 3, it is clear that the wid far lowers total active losses i the syste by MW to the value MW that is to say a profit of MW ad total reactive losses by MVAR to MVAR, a profit of MVAR. Table. DFIG ad wid odel paraeters Power, Voltage ad Frequecy Ratigs [MVA, V, Hz] [600, 69, 60] Stator Resistace Rs, stator Reactace Xs [p.u, p.u.] [0.01, 0.10] Rotor Resistace Rr, Rotor Reactace Xr [p.u, p.u.] [0.01, 0.08] Magetizatio Reactace X [p.u.] [3.00] Pitch cotrol gai Kp, tie costat Tp [p.u, s] [10, 3] Voltage cotrol gai Kv, Power Cotrol tie costat Te [p.u, s] [10, 0.01] Nuber of Pole, gear box ratio [it, -] [4, 1/89] Blade legth, uber [, it] [75.00, 3] P ax ad P i [p.u, p.u.] [1.00, 0.00] Q ax ad Q i [p.u, p.u.] [0.7, -0.7] Nuber of geerators 300 Noial wid speed, air desity [/s, g/3] [15, 1.5] Filter tie costat, saple tie [s, s] [4, 0.1] Weibull costat C ad K [0, ] Rap costats tsr, ter ad Awr [s, s, /s] [5, 15, 1] Gust costats tsg, teg ad Awg [s, s, /s] [5, 15, 0] Turbulece costats h, Z0, Δ f ad [, -, Hz, -] [50, 0.01, 0., 50] The wid far produced 66,3576MW ad MVAR ad icrease buses that are relatively ear fro wid productio aely bus 3, 4, 5,6,7,8 ad 9. Buses 5, 6,7,8,9 ad 30 have lower voltages relative to the other. Table 3. Total geeratio, losses ad slac bus productio with ad without wid far. Results Total geeratio Total losses Slac bus productio P [MW] Q[Mvar] P [MW] Q [Mvar] P[MW] Q[Mvar] Base case with wid far

11 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p Figure 7. IEEE 30 bus test syste with wid far iserted i PSAT 8 Wid Speeds v w v w [/s] tie [s] Figure 8. Wid speed of DFIG (/s) 107

12 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI p ω * Dfig tie (s) Figure 9. Wid power of DFIG (pu) Case C: ipact of wid far with FACTS o syste I this part, the effect of coectig wid far with FACTS. SVC coected to bus 30 produced MVAR to aitai the voltage at the desired value. The istallatio of the SVC at bus 30 with wid far ehaces the voltage profile at differet buses. The TCSC taes a value of Xc=0.793 pu. Fro the results, the wid far at bus 10 ad TCSC betwee bus ad bus 5 lowers total losses i the syste by MW to the value MW. Voltages profiles of the base case, the syste with wid far ad, fially, the syste with wid far ad SVC are illustrated i Figure 10. Losses of real power of base case, syste with wid far ad fially syste with wid far ad TCSC are show i Figure

13 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p Votage profile (PU) Figure 10. Voltage profiles i differet cases base case with wid turbie at B with wid turbie at B Ploss(MW) base case with wid turbie at Bus 10 with wid turbie at Bus 10 ad TCSC betwee bus ad Bus 1 0 Figure 11. Active losses i differet cases Total eergy geerated by wid turbies i differet cases is show i Figure 1. The total eergy geerated ad the total eergy losed of active ad reactive power i differet cases, are show i Figure 13 ad Figure 14 respectively With wid turbie at bus TCSC betwee bus ad With wid turbie at bus SVC at bus 30 With wid turbie at bus Figure 1. Geeratio of wid far i differet cases 109

14 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI 350 Total geeratio of active power [MW] Total geeratio of reactive power [MVAR] 50 total losses of active power [MW] total losses of reactive power [MVAR] base case With SVC 30 With TCSC (-5) With wid turbie With wid With wid turbie ad turbie ad SVC TCSC base case With SVC 30 With TCSC (-5) With wid turbie With wid turbie ad SVC With wid turbie ad TCSC Figure 13. Total geeratio of syste i differet cases Figure 14. Total losses of syste i differet cases Fro the results of the siulatios, the total geeratio ad losses of syste were decreased after the isertio of wid geeratio ad FACTS devices ad the proposed approach yields better results. Coclusios Siulatio was illustrated by the use of oe of the ost recet software which is software PSAT. This latter was applied without ay failure or istability i siulatio. Differet cases have bee tested o IEEE 30 bus test syste ad preseted to show the efficiecy of the wid itegratio ad FACTS o power systes. The first part showed the positive cotributio of the itegratio of FACTS devices i the etwor o voltage profile ad power trasitted. The Thyristor cotrolled series capacitor (TCSC) is oe of the ost popular FACTS cotrollers, ad this device is the best choice for icreasig the lie power trasfer as well as to ehace the voltage profile of the syste. Siulatio results show that Static Var Copesator (SVC) geerates or absorbs reactive power whose output is adjusted to exchage capacitive or iductive curret to aitai or cotrol specific paraeters of the electrical power syste, typically the bus voltage. The secod part was devoted to the itegratio of wid sources, the applicatio of the proposed approach o IEEE 30 bus test syste yields better results, which has cocluded that the use of wid fars has sigificat beefits i reducig the real ad reactive power loss ad the icrease of the voltage profile. 110

15 Leoardo Joural of Scieces ISSN Issue 6, Jauary-Jue 015 p The total geeratio of syste ad slac bus productio were reduced after the isertio of wid far. Fially, fro the results preseted i this paper it ca coclude that the itegratio of wid far with FACTS ehaces the power flow ad resolve the voltage istability. Refereces 1. Goggui C., Jifu C., Xiazhog D., Power flow ad Dyaic optial power flow icludig wid fars, sustaiable power geeratio ad supply, SUPERGEN 09, 009, p Muoz J. C., Caizares C. D., coparative stability aalysis of DFIG-based wid far ad covetioal sychroous geerators, IEEE Power Syste ccoferece ad Expositio (PSCE), 011, p Awad E. A., Badra E. A., Youssef F. M. H., Mitigatio of Switchig Overvoltages due to Eergizatio Procedures i Grid-Coected Offshore Wid Fars, Iteratioal Joural of Advaced Research i Electrical, Electroics ad Istruetatio Egieerig, 014, 3(1), p Soasudaral P., Muthuselva N. B., Security costraied optial power flow with FACTS devices Usig odified particle swar Optiisatio, Spriger-Verlag Berli Heidelberg, 010, 6466, p Milao F., A Ope source power syste aalysis Toolbox, IEEE Trasactios o power Systes, 005, 0(3), p Pohrel B. R., Adhiary B., Study of Wid peetratio ad its ipacts i Kathadu Valley, IEEE ICSET, 010, p Sreejith S., Sishaj P. S., Selva M. P., Power flow aalysis icorporatig Firig Agle Model Based TCSC, 5th iteratioal coferece o idustrial ad iforatio Syste ICIIS, 010, p ZarateMiao R., Coejo A. J., Milao F., OPF-based security redispatchig icludig FACTS devices, IET Geer. Tras. Distrib, 008, (6), p Ladja F., Ould abdesla D., Gherbi F. Z., Optial Locatio of Thyristor-Cotrolled Series Copesator for Optial Power Flows, Iteratioal review o Modelig ad siulatios (I.R.E.M.O.S), 008, 6(), p

16 Ipact of wid turbie based o double feed iductio geerator ad FACTS devices o power systes Labiba ADJOUDJ, Fatiha LAKDJA, Fatia Z. GHERBI 10. Gherbi F. Z., Ladja F., Berber R., Boudjella H., Dispatchig écooique au oye du dispositif FACTS, Acta Electrotehica, 010,51(1), p Sigh B., Itroductio to FACTS Cotrollers i wid Power Fars a techological review, Iteratioal Joural of Reewable Eergy Research, 01, (), p Adjoudj L., Ladja F., Gherbi F. Z., Ould Abdesla D., Sythesis itegratig wid geeratio ad FACTS of etwor, iteratioal coferece o electrical scieces ad techologies i aghreb (CISTEM), Babu B. C., Mohaty K. B., Poogothai C., Wid turbie drive doubly feed iductio geerator with grid discoectio, i Magetis, 1963, III G. T. Rado ad H. Suhl, Eds. New Yor: Acadeic, pp Milao F., Power flow aalysis toolbox docuetatio for PSAT versio.0.0, Power Systes Test Case Archive [olie], Available at: Sasidhara S., Weeraor O., Sigh J. G., Maxiisatio of istataeous wid peetratio usig particle swar optiisatio, iteratioal joural of Egieerig sciece ad Techology, 010, (5), p