The specialist in intelligent power systems. Your first choice for Smart Grids. Energy Technology Intellectual Property

Transcription

1 Your first choice for Smart Grids TIP nergy Technology Intellectual Property

2 Introduction By the use of renewable energies and the decentralization of electricity generators a dramatical change in electrical energy grids is taking place. This leads to a new supply system layout covered under the transition goal called Smart Grids. In Smart Grids new system requirements for automation, communication and power quality are provided and have to be fulfilled. The major challenge is to establish a dynamic control function like primary and secondary controller of conventional power plants and grids from the TSO level into the low and medium voltage grid level (DSO level). These kinds of functionalities must be implemented into the power electronic inverters and into the control function of decentralized synchronous generators as well. Additionally, the automation system for the DSO level has to be adapted to these new requirements. The substation automation must be fitted into these new grid control functionalities. Therefore the demand for new Smart Grid orientated solutions which are flexible, adaptive, sustainable and cost effective are obvious. ntesys Mission and Vision ntesys develops and offers innovative technologies to advance the integration of distributed, renewable power supply systems. The focus is on how these decentralized systems can coexist with conventional power plants. ntesys developed a strategy to fulfill the complex requirements which electric energy supply systems of the future will have. TIP - nergy Technology IP As a specialist for intelligent software solutions for smart grids, ntesys develops FPGA-based IP Cores for power system components. These nergy Technology IP Blocksets TIP offer a platform for simple, fast and flexible FPGA based development for electronic devices in Smart System applications. The modular TIP Blocksets are consequently designed related to the requirements of Smart Grids. TIP Blocksets cover the different types of feeding modes and grid code from the TSO and DSO side. In terms of communication IP Cores for standard ITC technologies via thernet and fieldbuses are available (TCP/IP, thercat, etc.). The TIP Blocksets philosophy offers a wide range of application fields in Smart Grid devices. Starting from power electronic inverters, substation automation systems up to a direct PLC integration. The TIP Blocksets cover all basic and major Smart Grid control and automation functionalities. The figure below shows in principle the wide application range of TIP -based systems graphically. TIP - Blocksets for Development of FPGA-based Smart Grid Systems Problem Statement System Speci ca on Valida on Target Hardware FPGA Pla orm Inverter 3 ~ Basic Blockset Basic funtions for power electronics inverters (symmetrical) Feeding modes for interconnected and isolated Grids Advanced Blockset Advanced functions for power electronics inverters (unsymmetrical) Feeding modes for interconnected and isolated Grids (unsymmetrical) Grid Code Blockset Grid Code / Fault Right Though Functions for grid tied inverters Power Quality Blockset - Power Quality Measurement DIN N standards. Methods for Voltage quality measurement according to N standards and more. TIP - Model based Design Flow Development benefits System optimization in early development state High development quality and transparency in TQM High time and cost effectivity related to complexity of Smart Grid functions Reduction of the development risk in regard of the complexity of the target application Reduction of development effort via automatic code generation L f FPGA-based Control Platform Basic Blockset Grid Code Blockset TIP Collection Target oriented Abstrac on Phenomenological Descrip on TIP Design Flow Quartus II VHDL Synthesis Advanced Blockset Local Grid Power Quality Blockset Simula on Math. Model (Matlab/Simulink) Altera DSP Builder Blockset Target hardware oriented Modeling SGAU 3~ 50 kw SGAU SGAU 3~ Intelligent Substation Distribution Grid Prosumer (Producer & Consumer) TIP

3 TIP - Smart Grid Inverter Starter Kit Including power electronic and programmable FPGA-based controller-board The developed TIP Blocksets can be used to run the Smart Grid Inverter Starter Kit in combination with the FPGA development Platform SnakeBytes from the company devboards GmbH. This combination of Hardware and TIP Software components gives a fast entry into inverter technology for present and future ure requirements. TIP Smart Grid Inverter Modul-Power: up to 25 kva DC-Voltage: max 800 V (intermediate circuit) AC-Voltage: 3 * 400 V Current / Phase max 36 A 3Leg-4Wire Topology 2 Level Inverter Tough 19 rack design Photos can differ from the original asy and fast to connect using HARTING Industrial Connector Han TIP - Smart Grid Inverter FPGA Development Platform based on devboards SnakeByte The DBF3C120 is the second baseboard of a flexible development board family based on the Altera FPGAs. The baseboard is equipped with all the necessary functions to run the FPGA like power supply, clocking, reset generation and configuration device. All the I/O pins are connected to DBF-Slots. The DBF3C120 board is equipped with 7 DBF-Slots and a PCI-Interface. P3C120F780C7N ALTRA FPGA PCS64 configuration device 4 power supplies for 1.2V core voltage, 2.5V and 3.3V I/O voltage custom specific voltage 7 I/O-Bank regulators for VCCIO 4 LDs and 4 buttons JTAG-Interface Clock distribution 7 DBF-Slots for I/O and memory expansion PCI-Interface for 32bit / 66MHz PCI Dimension: 170x106mm² Tyco industrial power connector FPGA Developement Platform ADD ON-Cards Measurement signals 12V I/O 3xthernet et Phy connector necto SnakeByte DBF3C120 from devboards GmbH communication ion thercat is registered trademark and patented technology, licensed by Beckhoff Automation GmbH, Germany. SDRAM SDRAM Falconye signal interface

4 TIP - Smart Grid Inverter Starter Kit - 2 level inverter consisting of a 3Leg-4Wire topology System Parameter Bidirectional Inverter Modul-Power: up to 25 kva DC-Voltage: max 800 V (intermediate circuit) AC-Voltage: 400 V LL Current / Phase up to 36 A The 3Leg-4Wire topology supports unsymmetrical load situations. The two level inverter has a very low THD. Fast integration in Automation Systems Further, this scalable power electronics with the real-time communication thercat can be used in conjunction with a standard IC61131-PLC. Thus, in addition there is the possibility to involve all the advantages of industrial automation components in the plant management. This provides the most flexible inverter platform which can be adapted to complex and unusual tasks. Ci IC61131-based Automation Platform (thercat Master) Smart Grid Inverter Starter Kit SGISK2510a 3 ~ Lf Cf FPGA-based Control Platform (thercat Slave) Grid Other Actors and Sensors (thercat Slave s)

5 TIP Basic and Advanced Blockset The developed TIP Cores (nergy Technology Intellectual Property) represent control functions blocksets for power electronic converter, inverter based on FPGA. The Cores provide the possibility to control one or three phase inverters in each feeding mode. Inverter Feeding Modes at Grid Side TIP - Grid Code Blockset Dynamic Grid Support: Fault Ride Through V_pu Boundary Line 1 Boundary Line CS Driven Feeding Grid Driven Feeding Disconnecting from Grid Grid Parallel Grid Forming Grid S 0 t [ms] [The BDW guideline Generating Plants in the Medium-Voltage Grid"] Supply of reactive current during voltage deviation Symmetrical Asymmetrical Symmetrical Asymmetrical Symmetrical Asymmetrical Based on: [Department of lectrical Power Supply, University of Applied Science Soest] II underexcited Q/P r I underexcited / MATLAB Simulink 0.48 Basic Blocks: PI-Controller, Sin/Cos Generator, Pulse Width Modulator Transformation Blocks: Clarke & Park transformation, band pass, symmetrical components, etc III overexcited P/P r IV overexcited [VD-AR-N 4105: ] Space Vector Modulator (SVM) Blocks: SVM for several one and three phase inverter topologies Active power reduction Phase Locked Loop (PLL) Blocks: PLLs for one and three phase signals Inverter Control Blocks: Control algorithms for different feeding modes and different inverter topologies P 10% 20% Hz 50.2 Hz f grid P 40% P M per Hz [VDN TransmissionCode 2007] TIP Power Quality Blockset N , Method for voltage quality measurement. Testing and measurement techniques - Power quality measurement methods. N , Testing and measurement techniques - General guide on harmonics and interharmonics measurements and instrumentation, for power supply systems and equipment connected thereto. N , Testing and measurement techniques - Flickermeter - Functional and design specifications. 0 Voltage t 10 Periods t 10 min Interval 10 min t 10 Periods t 10 Periods t 10 Periods t 10 Periods t Voltage and Current Measurement: RMS values over different periods (10 periods, 150 periods, 10 min, 2h) Indication by voltage deviation (voltage drops, gaps or over voltage). Power Measurement: Measurement of active, reactive and apparent power over 10 periods Measurement of power factor cos( ). FFT Analysis: Harmonics, THD, intermediate harmonics over 10 periods Flicker: Short time and long-time flicker, flicker level Asymmetry: Asymmetry of a three phase system

6 TIP MATLAB Simulink Blocksets TIP Basic Blockset 1 Nor al za o _1_S al 9 PI_Co roller 2 Nor al za o _3_S al 10 UI_ o_pq 3 UVW_ o_alphabe a 11 PLL_1Phase 4 AlphaBe a_ o_dq 12 PLL_3Phase 5 dq_ o_alphabe a 13 SV _FB 6 AlphaBe a_ o_uac _s 14 SV _HB 7 PT1 15 SV _3L3W 8 S _Cos_Ge era or 16 PW (as VHDL) TIP Advanced Blockset 1 UVW_ o_alphabe a_ll 6 SV _3L4W 2 UV_ o_alphabe a_ll 7 SV _4L4W 3 UV_ o_alphabe a 8 S _Co p 4 U_ o_alphabe a 9 PLL_DDSRF_3Phase 5 U_ o_alphabe a_50hz TIP Grid Code Blockset 1 Faul _R de_throu h - 4 Pac _Qse 2 S a c_gr d_suppor 5 cosph _se 3 Reac ve_curre TIP Power Quality Blockset 1 Freque c _ easure e 5 Vol a e_as e r 2 Overvol a e_drop_gap 6 Har o c_ easure e 3 Vol a e_curre _ easure e 7 Power_ easure e 4 Fl cker Through a close cooperation with the department of lectrical Power Supply of the University of Applied Science Soest, we have a competent partner with many years of experience to the side for the development of technical innovations Altera Corporation. All Rights Reserved. The DSP Builder library shortens DSP design cycles by helping users create the hardware representation of a DSP design in an algorithm-friendly development environment. Altera Corporation Innovation Drive, San Jose, CA 95134, UNITD STATS Tel: , Fax: , -mail: dsp@altera.com 2013 MathWorks, Inc. MATLAB and Simulink are registered trademarks of MathWorks, Inc. See for a list of additional trademarks. Other product or brand names may be trademarks or registered trademarks of their respective holders. MATLAB, the language of technical computing, is a programming environment for algorithm development, data analysis, visualization, and numeric computation. Simulink is a graphical environment for simulation and Model-Based Design for multidomain dynamic and embedded systems. Telefon: +49 (0) / Telefax: +49 (0) / Mail: info@entesys.de Internet: ntesys GmbH Ulricherstr Soest, Germany Managing Director: Dipl.-Ing. (FH) Stephan Heger Register Court: Amtsgericht Arnsberg Company Registration Number: HRB 9462