Design Space Exploration for Complex Automotive Applications: An Engine Control System Case Study

Transcription

1 Design Space Exploration for Complex Automotive Applications: An Engine Control System Case Study Khalid Latif 1 Manuel Selva 1 Charles Effiong 1 Roman Ursu 1 Abdoulaye Gamatie 1 Gilles Sassatelli 1 Leonardo Zordan 1 Luciano Ost 1 Piotr Dziurzanski 2 Leandro Soares Indrusiak 2 1 LIRMM (CNRS and University of Montpellier) 2 University of York 18 January 2016

2 Motivations Source: 1 / 12

3 This Work Objectives Simulation framework Rapid prototyping Easily configurable Design space exploration of an automotive application Hypotheses Application described using AMALTHEA 1 Distributed memory multi-core platform / 12

4 TICK-TOCK TICK-TOCK AMALTHEA L1 R2 T2 L3 L4 T1 R1 R4 R5 R6 L2 R3 R8 R9 R10 R11 T3 R12 T Application Rx Runnable Lx Label Rx Tx Rx Task 3 Periodic task Task activation 3 / 12

5 Simulated Hardware Core Router Memory Priority-Preemptive Arbitration NoC 2 2 Evgeny Bolotin et al. QNoC: QoS architecture and design process for network on chip. In: JOURNAL OF SYSTEMS ARCHITECTURE 50 (2004), pp / 12

6 Simulation Framework Overview Application model AMALTHEA Simulator Execution Manager Mapper Manycore Platform C++/SystemC Results Execution time, Energy Deadline misses Text files 5 / 12

7 Mapper Responsibilities Map runnables on cores Map labels on memories Mapper Interface core maprunnable(string id); core maplabel(string id); void runnableended(long time); ZigZag Local Max State of the art 3 3 A.K. Singh et al. Mapping on multi/many-core systems: Survey of current and emerging trends. In: 50th ACM / EDAC / IEEE Design Automation Conference (DAC) / 12

8 Cores Simulator Speed vs Accuracy dilemma Based on information from AMALTHEA Transaction Level Modeling with Time (TLM-T) 7 / 12

9 Cores Simulator Speed vs Accuracy dilemma Based on information from AMALTHEA Transaction Level Modeling with Time (TLM-T) Configurable Different schedulers Different type of cores Clock frequency Energy efficiency 7 / 12

10 NoC Simulator Speed vs Accuracy dilemma Transaction Level Modeling with Time (TLM-T) Only simulate packets entering/leaving the NoC 4 4 Leandro Soares Indrusiak, James Harbin, and Osmar Marchi dos Santos. Fast Simulation of Networks-on-Chip with Priority-Preemptive Arbitration. In: ACM Transactions on Design Automation of Electronic Systems 20.4 (Sept. 2015), p / 12

11 NoC Simulator Speed vs Accuracy dilemma Transaction Level Modeling with Time (TLM-T) Only simulate packets entering/leaving the NoC 4 Configurable NoC size Hop latency Router latency Full duplex or not? 4 Leandro Soares Indrusiak, James Harbin, and Osmar Marchi dos Santos. Fast Simulation of Networks-on-Chip with Priority-Preemptive Arbitration. In: ACM Transactions on Design Automation of Electronic Systems 20.4 (Sept. 2015), p / 12

12 Engine Control System Case Study Engine Control Application Throttle Angle Driver Accelerator Pedal Position Air System Desired Throttle Position Support Battery Voltage Vehicle Speed Mass Air Flow Ignition On Fueling System Ignition System Time Actuation System Ignition Time Injection Time Engine Cylinder Number Engine Speed 9 / 12

13 Engine Control System Case Study Engine Control Application Throttle Angle Driver Accelerator Pedal Position Air System Desired Throttle Position Support Battery Voltage Vehicle Speed Mass Air Flow Ignition On Fueling System Ignition System Time Actuation System Ignition Time Injection Time Engine Cylinder Number Engine Speed AMALTHEA model 109 tasks 1239 runnables labels 9 / 12

14 Exploration Parameters NoC size Mapper Scheduler, Frequency,... NoC Simulation Execution Deadline #Packets APL Size Time (sec.) Time (µs) misses (%) in NoC (ns) Loc. ZZ Loc. ZZ Loc. ZZ Loc. ZZ Loc. ZZ Ref / 12

15 Execution time vs Deadline missed vs Comm. volume Communication Volume (packets) x8 7x8 8x9 10x10 9x9 7x7 9x10 9x10 9x9 8x9 8x8 10x10 7x7 7x Deadlines Missed (%) Execution Time (microsec) 11 / 12

16 Conclusion Fully operational simulation flow To be released soon 5 Perspectives Other input formats Different accuracy levels Analyses of the results / 12