80 SEGMENT DRIVER FOR DOT MATRIX LCD S6A2067
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- Clarence Evans
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1 80 SEGENT DRIVER FOR DOT ATRIX LCD INTRODUCTION The is a LCD driver lc which is fabricated by low power COS technology. Basically this lc consists of 40 x 2 bit bi-directional shift register, 40 x 2 bit data latch and 40 x 2 bit LCD driver (refer to Figure 1). This lc can be used as segment driver. FUTION Dot matrix LCD driver with 80 channel output. Input / Output signal - Output: 40 x 2 channel waveform for LCD driving - Input: Serial display data and control signal pulse from the controller lc. Bias voltage ( to ) FEATURES Display driving bias: static ~ 1/5 Power supply voltage: 2.7V to 5.5V Supply voltage for display: 3.0V to 13.0V (V LCD = V DD - V EE ) Interface Driver (cascade connection) Controller COS Process S6A0065, Other 100QFP or bare chip available S6A0069 S6A0070 S6A0073 1
2 80 SEGENT DRIVER FOR DOT ATRIX LCD BLOCK DIAGRA S1 S2 Part 1 S39 S40 S41 S42 Part 2 S79 S80 LCD DRIVER LCD DRIVER Data Latch (40 bits) Bidirectional Shift Register (40 bits) Data Latch (40 bits) Bidirectional Shift Register (40 bits) VDD VSS VEE SW CL1 CL2 Contr Logic DL1 SHL1 DR1 DL2 SHL2 DR2 Figure 1. Functional Block Diagram 2
3 80 SEGENT DRIVER FOR DOT ATRIX LCD 3 PIN CONFIGURATION S71 S72 S73 S74 S75 S76 S77 S78 S79 S80 S40 S39 S38 S37 S36 S35 S34 S33 S32 S S70 S69 S68 S67 S66 S65 S64 S63 S62 S61 S60 S59 S58 S57 S56 S55 S54 S53 S52 S51 S50 S49 S48 S47 S46 S45 S44 S43 S42 S DR2 DL2 DR1 DL1 CL2 VDD SHL2 SHL1 CL1 GND VEE S30 S29 S28 S27 S26 S25 S24 S23 S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S Figure QFP Top View
4 80 SEGENT DRIVER FOR DOT ATRIX LCD PAD DIAGRA Y (0, 0) X Chip size: Pad size: Unit: µm
5 80 SEGENT DRIVER FOR DOT ATRIX LCD PAD CENTER COORDINATES PAD PAD COORDINATE PAD PAD COORDINATE PAD PAD COORDINATE NU. NAE X Y NU. NAE X Y NU. NAE X Y 1 S S S S S S S GND S S CL S S SHL S S SHL S S VDD S S CL S S DL S S DR S S DL S S DR S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S VEE S S S S * arking: easy to find the PAD No.6, No.90 5
6 80 SEGENT DRIVER FOR DOT ATRIX LCD PIN DESCRIPTION PIN (NO.) I/O Name Description Interface V DD (42) Power Operating Voltage For logical circuit ( V) Power V SS (GND)(36) 0V (GND) Supply V EE (31), (32, 33), (34,35) Input Input Negative Supply Voltage LCD driver output voltage level For LCD driver circuit Bias voltage level for LCD drive (Select level) Bias voltage level for LCD drive (Non-select level) Power S1 - S40 Output Part 1 LCD driver LCD driver output LCD SHL1(38) Input Data Interface Selection of the shift direction of shift register V DD or V SS SHL1 DL1 DR1 VDD OUT IN VSS IN OUT DL1, DR1 (44,45) Input Output Data Input/output of shift register (part 1) Controller or / S6A0065 S41 - S80 Output Part 2 LCD driver LCD driver output LCD SHL2 (39) Input Data Interface Selection of the shift direction of shift register V DD or V SS SHL2 DL2 DR2 VDD OUT IN VSS IN OUT DL2, DR2 (46,47) Input Output (48) Input Alternated signal for LCD driver output CL1, CL2 (37,43) (40,41,49,50) Input Data shift/ latch clock Data Input/output of shift register (part 2) The alternating signal to convert LCD drive waveform to AC CL1 : Data latch clock CL2 : Data shift clock No connection Controller or / S6A0065 Controller 6
7 80 SEGENT DRIVER FOR DOT ATRIX LCD AXIU ABSOLUTE LIIT (TA = 25 C) Characteristic Symbol Value Unit Operating Voltage V DD V Driver Supply Voltage V LCD V DD V DD +0.3 V Input Voltage 1 V ln V DD +0.3 V Input Voltage 2 ( - ) V IN2 V DD V EE -0.3 V Operating Temperature T OPR Storage Temperature T STG C C * Voltage greater than above may damage the circuit * V EE : connect a protection resistor (220Ω ± 5%) ELECTRICAL CHARACTERISTICS DC Characteristics (V DD = 2.7 to 5.5V, V DD -V EE = 3-13V, V SS = 0V, Ta = -30 to 85 C) Characteristic Symbol Test condition in ax Unit Applicable pin Operating Current l DD f CL2 = 400kHz - 1 ma V DD, V EE Supply Current l EE f CL1 = 1kHz - 10 µa Input High Voltage V IH - 0.7V DD V DD V CL1, CL 2,DL 1, Input Low Voltage V IL 0 0.3V DD DL 2, DR 1, DR 2, Input Leakage Current l LKG V IN = 0 - V DD -5 5 µa SHL1, SHL2, Output High Voltage V OH I OH = -0.4mA VDD DL 1, DL 2, Output Low Voltage V OL I OL = +0.4mA 0.4 V DR 1, DR 2 Voltage Descending V D1 I ON = 0.1mA for one of S1 - S80 V D2 I ON = 0.05mA for each S1 - S80 Leakage Current I V V IN = V DD - V EE (Output S1 ~ S80: floating) V (-)-S (S1-S80) µa - 7
8 80 SEGENT DRIVER FOR DOT ATRIX LCD AC Characteristics (V DD = 2.7 to 5.5V, V DD -V EE = 3 to 13V, V SS = 0V, Ta = -30 to 85 C) Characteristic Symbol Test condition in ax Unit Applicable pin Data Shift Frequency f CL khz CL2 Clock High Level Width t WCKH CL1, CL2 Clock Low Level Width t WCKL CL2 Clock Set-up Time t SL from CL 2 to CL t LS from CL 1 to CL Clock Rise/Fall Time t R /t F CL1,CL2 Data Set-up Time t SU DL1,DL2,DR1,DR2 Data Hold Time t DH DL1,DL2,DR1,DR2 Data Delay Time t D C L = 15pF ns DL1,DL2,DR1,DR2 8
9 80 SEGENT DRIVER FOR DOT ATRIX LCD TIING CHARACTERISTICS CL2 VIH VIL twckl VIL VIH tr twckh tf tdh Data in (DL1,DL2) (DR1, DR2) Data out (DL1,DL2) (DR1, DR2) VIH td VOH VIL VOL tsu tsl tls tls CL1 VIH VIL twckh tsu tr tf FL VIH VIL Figure 3. AC Characteristics 9
10 80 SEGENT DRIVER FOR DOT ATRIX LCD LCD OUTPUT WAVEFORS Output of Latch (DATA) OUTPUT (S1 - S80) APPLICATION CIRCUIT CO1 ~ CO16 S6A0069 D (controller) CLK1 VDD CLK2 V5 common signal S1 - S80 SHL1 SHL2 DL1 DR1 DL2 CL1 CL2 (seg driver) DR2 LCD Segment signal S1 - S80 SHL1 SHL2 DL1 DR1 DL2 CL1 CL2 (seg driver) DR2 open VEE VEE GND or Other Voltage VDD 10
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