Universal Step-Down DC/DC Converter Design Using AIC1563

Transcription

1 Universal Sep-Down DC/DC Converer Design Using AIC56 Ben Tai Absrac olage required in he modern elecronic sysems are single or muliple regulaed volages such as., 5, 2, -5, or 2, ec. I can be supplied by using DC/DC converers. The operaions of Sep-Down DC/DC converer is inroduced in he applicaion noe. A pracical consan volage, DC/DC sep-down converer design based on he AIC56 is also illusraed o help he readers in he circui designs and applicaions. driving signal o urn on or urn off on he power swich (SW). The power swich can be conrolled by using differen mehods, such as pulse widh modulaion (PWM), pulse frequency modulaion (PFM), or pulse skipping modulaion (PSM), depends on he applicaions. As for he oupu volage sabiliy, i is mainained by conrolling he duy cycle wihou losing energy. This may be illusraed by examining he energy sored in he inducor. Operaions of Sep-Down DC/DC Converer G Driving signal on SW Figure shows a basic circui configuraion of sep-down DC/DC Converer. SW IN G L - D L C OUT LOAD I OUT I SW I L OUT SW curren Inducor curren CONTROL CIRCUIT Oupu volage Fig. Sep-Down DC/DC Converer The volage and curren waveforms in he circui are shown in Fig. 2. The conrol circui is used o deec he oupu volage level and generaes a Fig. 2 olage and curren waveforms of converer The inpu elecric energy is delivered o he load and parially sored in an inducor during he power swich urned on. The sored energy will be also ransferred o he load hrough a free-wheel diode May 997

2 during he power swich urned off. Figure shows L T ON IN - OUT T T OFF - OUT Fig. olage waveform of he inducor Here PWM conrol mehod is used o illusrae he relaionship beween inpu and oupu volage. I can also be applied o boh PFM and PSM. To preven he inducor from sauraion, he inducor mus release he same amoun of energy as is sored under he sable condiion. If no so, he inducor will ener a sauraion region and lose is capabiliy of soring energy due o unbalanced energy. This can be expressed as T 0L IOUT d 0 T...() In which T is he period, L is he inducor volage, and I OUT is he oupu curren (DC). From Fig. we can derive ( IN - OUT ) T ON = OUT T OFF...(2) he volage waveform of he inducor in a cycle. in deail. Operaions of AIC56 Basically AIC56 is a universal DC/DC converer IC ha may be applied o he design of sep-down DC/DC converer, sep-up DC/DC converer, and invering DC/DC converer. I has an ulimae performance when i is applied o a sep-down DC/DC converer. Figure 4 is a funcion block diagram of AIC56 ha consiss of a frequency generaor, a volage comparaor, a curren limiing conroller, a Darlingon swiching ransisor, and boosrap driver. SC SE TC GND 4 2 Q Q Reference olage QS R Is Oscillaor Comparaor BST IS CC FB OUT IN DUTY...() TOFF T Fig. 4 AIC56 funcion block diagram Where DUTY is he duy cycle raio. Eq. indicaes ha he raio of oupu volage o he inpu volage is he duy cycle raio. Therefore, by sensing he oupu volage o conrol he duy cycle, he oupu volage can be well sabilized. In he following wo secions, he operaions and a pracical design example of AIC56 are explained May 997 The working volage of AIC56 is beween and 0. I is recommended o operae i beween 50KHz and 00KHz o obain an opimum performance, alhough is operaing frequency is ranging from 0 Hz o 00 khz. AIC56 is conrolled by pulse skipping modulaion (PSM). When he oupu volage a FB pin of volage 2

3 comparaor is below.25, i drives he Darlingon swiching ransisor wih a consan frequency and duy cycle o elevae he oupu volage. On he oher hand, he Darlingon swiching ransisor sops swiching when he oupu volage a he FB pin is higher han.25, and he oupu volage will be decreased o sabilize he oupu volage. Figure 5 is he ime sequence waveforms for he pulse skipping modulaion conrol mehod. As i is shown, his ype of conrol can aain he sable sae naurally wihou a compensaion circui. In addiion, his conrol mehod requires a simpler circui wih low quiescen curren and i can achieve very high volage conversion efficiency under ligh load. TOFF Oscillaor Oupu Error Comparaor Inpu Error Comparaor Oupu REF Sensed Oupu Driver Oupu Fig. 5 Time sequence waveforms of pulse skipping modulaion (PSM) In a swiching ype DC/DC converer, he swiching loss of he swich can affec he converer s efficiency direcly. Since a high side swich is configured in a sep-down DC/DC converer, a PNP ransisor is normally used. However, he characerisics, cos and suppliers of PNP ransisors are no as good as ha of NPN ransisors. The problem wih using NPN ransisors is ha hey canno be driven o he sauraion region if hey are swiched on high side. This leads o a lower convering efficiency. AIC56 no only uses a 2A peak curren NPN ransisor as a swiching swich, bu also includes a boosrap driver o drive he ransisor ino he sauraion region. This has improved he efficiency dramaically. Running i in a coninuous oupu curren below.5a is he bes working condiion. Is efficiency can be as high as 90% depending on he exernal componens used. There is no need o add exra hea sink fins o an 8-pin DIP package wih a.5a oupu curren. If larger oupu curren is required, an inexpensive NPN ransisor can be added exernally. The boosrap driving circui can also drives he exernal NPN ransisor ino he sauraion region ( CE =0.4 ) o achieve a high efficiency. Consan olage DC/DC Converer Design The main volage source required for he elecronic sysem producs such as video CD, DD, modem, and scanner is eiher 5 or 2, wih a maximum curren of A. We ake his as an example o design a 5/A consan volage DC/DC converer. Table is he elecrical specificaion for he design

4 example. We selec he operaing frequency of 50 KHz Table Specificaions for consan volage DC/DC converer applicaion example Iems Symbol MIN. TYP. MAX. UNIT Inpu volage IN 8 5 Oupu volage OUT Oupu curren I OUT 0. A Oupu ripple volage RIPPLE 50 m The Figure 6 is an applicaion circui diagram of DC/DC converer. The volage divider resisors RA and RB for oupu volage feedback can be obained from he formula OUT.25 ( RB ) RA (4) Since we have assumed he oupu volage o be 5, he raio of RB/RA is. The sum of RA and RB is bes seleced beween 0 K and 50 K. Therefore, we choose RA o be 0 K, and RB o be 0 K. D N448 D2 N448 IN R 680 RS C 00F BST IS CC FB C2 F SC 2 SE TC 4 GND AIC56 90K RS nf 220H * L D N589 C4 220F RB 0K RA 0K C5 5nF OUT 5/A R2 2.2M * L: Iron Pow der Core Fig. 6 Applicaion circui for 5/A sep-down ype consan volage DC/DC converer Combing equaion (2) and Figure 2 wih volage drops on he swiching ransisor and free-wheel diode, he volage difference on he inducor would be ( IN OUT - SAT ) if he ransisor is swiching on, where SAT is he swiching ransisor sauraion volage approximae 0.4. The volage drop on he inducor is ( OUT F ) if he ransisor is urning off, where SAT is he forward volage (0.2 ) of he free-wheel diode. Taking all of hese ino accoun, equaion (2) can be modified as 4

5 ( IN - OUT - SAT ) T ON =( OUT F ) T OFF...(5) and DUTY (MAX) = (MAX) T OUT F 66.67%...(6) IN(MIN) SAT F If we choose he swiching frequency as 50 KHz, hen he maximum urn-on ime of he swiching ransisor is T ON(MAX) =DUTY (MAX) x T=66.67% x 50K =.4S...(7) For he oscillaor in AIC56, he nominal charging curren is 25 A and is volage ampliude is 0.6. The formula d I =...(8) d can be simplified ino = I T ON(MAX)...(9) if he charging curren is a DC. I urns ou = 0.6 A.4S = 556pF...(0) Thus, we selec =470 pf wih an operaing frequency of 50 KHz. From he inducor curren waveform as shown in Fig. 2, he converer works in a coninuousconducion mode (CCM, he advanage of which is beyond he scope of his noe) when he minimum loading curren is 00 ma. Then he peak-o-peak curren ampliude of he inducor is ΔIP=2I OUT(MIN) =2 00mA=200mA...() To mainain he converer in a coninuousconducion mode under a minimum loading curren, he minimum inducance can be obained from Lenz s law L dil L......(2) d Based on he inducor volage waveform in Fig., he minimum inducance is L (MIN) I L P T IN OUT SAT IP ( ) () 7H We selec a 220H inducor for our design. For he consideraion of he inducor diameer, a conducor wih a cross-secional area of mm 2 can ake a A o 5A curren, which depends on he operaing emperaure. MPP core or inexpensive iron powder core is recommended as he core maerial of inducor. I is no recommended o use ype I inducors because hey are only good for low loading curren. They can deeriorae he converer efficiency considerably. The limiing curren resisor can be esimaed by 0. RS=...(4) ILIMIT If we se he shor circui proecion curren o be. A, hen Rs would be The minimum capaciance of he oupu capacior is C OUT I 8 55F P(MAX) RIPPLE ( 0.) - F (5) where F is he swiching frequency. The oupu volage ripple is ΔI L ESR, in which 5

6 50 0 ESR= (6). In order o reduce he oupu volage ripple below o 50 m, we selec a 200 F capacior. If a smaller oupu volage ripple is required, a capacior wih a smaller ESR should be considered. Explanaion of oher circui elemens in Fig. 6 is as follows. C is he inpu filer capacior. If he changing rae of inpu volage is fas, hen C needs a larger capaciance. C5 is he feedback capacior, which can increase he dynamic response of converers. RS and RS2 are compensaion resisors which can sabilize operaing frequency o make i work under PWM conrol mehod. RS provides an exra charging pah o increase swiching frequency. To mainain a swiching frequency of 50 KHz, is modified o nf. R and D consruc a saring circui o provide AIC 56 a saring curren. Under he normal working condiion, he driving curren of IC is provided from he oupu volage 5 via he diode D2. Therefore, R mus limi he volage beween IN and BST pin o below 5. If he oupu volage is 2, one can modify he circui elemens values as fore-menioned. The experimenal resuls of designing on he relaionship beween he efficiency and oupu curren and inpu volage are ploed in Fig. 7. Oher characerisics of he design are lised in able 2. Efficiency IN =8 IN = 2 IN = I OUT (A) Fig. 7 Efficiency characerisic curves of 5/A DC/DC converer Line Regulaor ( IN =8 5, I OUT =A) Load Regulaion ( IN =2, I OUT =0.A A) 50m 0m Shor Circui Curren ( IN =2).8A Table 2 Oupu characerisics of converer Conclusion There are many power supplies o provide seady volage sources for elecronic elemens in mos elecronic sysem producs. Only a few elecronic sysems use dry cell baeries as volage sources wihou volage converer because hey consis of a regulaor circui allowing a larger inpu volage variaion in elecronic elemens. Based on his, i is imporan o include a DC/DC volage converer in an elecronic sysem design. However, mos circui design engineers are unfamiliar wih his design echnique and ofen overlook his secion of design because i is a small porion of design in elecronic sysem producs. In addiion o wha is described in his applicaion noe, i is also criical o consider he layou on a prined circui board (PCB) when designing a DC/DC volage converer. Since large curren, high volage and high 6

7 frequency signals are used in volage converer, parasiic inducance and capaciance associaed wih PCB layou have an enormous impac on converer characerisics. 7