Laboratory Demonstration of Closed Loop 30kW, 200V/900V IGBT-based LCL DC/DC Converter

Laboratory Demonstraton of Closed Loop 30kW, 200V/900V IGBT-based LCL DC/DC Converter Seyed ahd Fazel, Dragan Jovcc, Senor ember, IEEE, and asood Hajan, Senor ember, IEEE Abstract-- The nductor-capactor-nductor (LCL) DC/DC converter has been extensvely studed for hgh power and steppng rato because of elmnaton of nternal transformer, lower footprnt/weght, hgher effcency, and most mportantly provdng DC fault solaton from both DC sdes. Ths paper presents a two-channel, two-layer controller ncludng two nner current loops, whch s symmetrcal for each brdge of LCL DC/DC. The real-tme mplementaton of control scheme and ts performance n normal condtons and durng transent DC faults at both sdes are studed on a 30kW 200V/900V.7 khz prototype. The prototype development s presented n some depth. The expermental results show that the converter wth closed loop control operates well at full power and under fast power reversal. Further DC fault testng concludes that there s no need for blockng snce the nternal voltage and current varables are wthn the rated values. Detaled study of converter losses s performed and results show that full power effcency s around 93.4%. Index Terms DC/DC converter, HVDC Transmsson, Insulated-Gate Bpolar Transstor (IGBT), DC Fault solaton. D I. INTRODUCTION C/DC converter s an mportant enablng component for developng offshore DC systems, ncludng applcatons wth wnd turbne (3-6 W) [],[2], subsea compressor (6-80 W) [3]-[4], and DC transmsson grd (>00 W) [5]- [8] technologes. Cgre uses two DC/DC converters n the DC transmsson grd test system [7], and t s consdered n several ongong B4 workng groups related to DC grds. Hgh effcency, hgh steppng rato, low weght/footprnt, DC fault tolerance, and bdrectonal power regulaton are consdered as most mportant specfcatons for a hgh power DC/DC converter [5],[6]. The dual or sngle actve brdge DC/DC converters wth nternal AC transformers can acheve large steppng ratos (transformng both voltage and current) whch results n good swtch utlzaton [8]-[0]. It also provdes galvanc solaton whch facltates flexble groundng n grd applcatons. However, desgnng a medum frequency, hgh-power transformer wth a hgh steppng rato, small footprnt/weght, low transformer core losses, and avodng core saturaton are most challengng ssues []. Ths work was supported by EPSRC UK grant no. EP/K006428/. The authors are wth the School of Engneerng, Unversty of Aberdeen, Aberdeen, UK (e-mal: d.jovcc@abdn.ac.uk). On the other hand, transformerless DC-DC converter topologes have been studed for hgh power applcatons because of advantages n sze/weght and possble hgher frequency operaton [2]-[8]. LCL dual actve brdge, transformerless approach acheves hgh steppng ratos and good swtch utlzaton (as f nternal transformers are used) and also beneft of zero reactve current flow through ether of the two brdges [5]. Snce ar-core nductors are used, passve components pose no lmtaton on operatng frequency. For an offshore applcaton, converter volume/weght has prorty over swtchng losses [7]. An addtonal advantage over solated topologes, s that LCL crcut can nherently lmt the fault current [5][6], whch s very mportant for hgh-power DC grd requrements. The studes n [7] ndcate that 500 Hz, GW, LCL DC/DC wth odular ultlevel Converter (C) brdges s expected to acheve effcency of 96-97%. There has not been much reported kw/w-sze hardware prototypng of DC/DC targeted to transmsson applcatons. In [4], a 0 kw multlevel buck/boost DC/DC converter has been bult and tested as proof of concept for hgh power applcaton. Excellent effcency of 96.7% s reported, but the operatng frequency of 20kHz may not be achevable n W-sze applcatons. A 9kW, khz, 300V sngle-actve brdge, solated DC/DC demonstrates 96% effcency n [0]. Snce dodes are used, the swtchng losses at hgh-voltage sde (prototype uses : rato) are lower but at the expense of undrectonal operaton and nablty to actvely operate for DC faults. Smlarly, kw, 300V DC/DC prototype of resonant nonsolated C n [2], has smple structure, flexble steppng rato and acheves good effcency, but lacks bdrectonal operaton and tolerance to DC faults. A 30kW 200V/900V transformerless, thyrstor-based DC/DC converter prototype, has been developed and tested n [4]. Despte all the advantages of ths topology, both hgh and low voltage sde swtches should be rated for hgh voltage level (low swtch utlzaton rato) whch restrcts applcatons to moderate steppng rato. In addton, reverse recovery losses mpact effcency and lmt maxmum operatng frequency to 580 Hz. The desgn, development, and open loop testng of a 30kW 200V/900V.7 khz LCL DC/DC prototype has been reported n [6]. It confrmed nherent DC fault responses but closed loop control s not reported. In [8] the ntal results wth closed loop controller for 30kW LCL IGBT DC/DC prototype were presented, although

2 full power operaton was not possble. The DC faults are not studed and also effcency analyss s not reported ether. Ths paper reports on contnued development of controller from [8], and detals the hardware mplementaton challenges and expermental testng of the 30kW 200V/900V.7kHz IGBT LCL DC/DC at the Aberdeen HVDC laboratory. The goal s to develop and test real-tme feedback controller whch enables fast power reference trackng, mnmses losses and acheves DC fault rde through from both sdes. The detals on the controller hardware mplementaton and converter component development wll be reported. The converter losses wll be nvestgated n depth usng the theoretcal loss model and compared wth hardware measured effcency. Fnally, desgn and performance of the LCL IGBT DC/DC converter wll be compared aganst a smlarly szed thyrstor-based LCL DC/DC converter whch has been prevously developed and tested n our laboratory [4]. II. LCL DC/DC CONVERTER A. LCL IGBT DC/DC Converter Topology and Desgn The 2-phase topology of the LCL DC/DC converter s shown n Fg. and the desgn s dscussed n depth n [5]. It conssts of two sngle-phase VSCs brdges wth an nternal LCL crcut. Tuned LCL provdes voltage steppng ensurng good utlzaton of brdge semconductors as f transformer s used, and also fault current lmtng. Wth a proper control angle, LCL also ensure current s n phase wth voltage at each brdge. The two actve brdges can be desgned based on 2 level pulse wdth modulaton (PW) or C. where s ampltude modulaton ndex, d and q are d-q components of control sgnal and V acm =0.5V dc s the maxmum value of V ac. The AC current phasor s obtaned as: Vq Vcq Vcd V I ji j d d q, 2 (5) L L Gven that the dq frame s algned wth the central capactor voltage V c =V cd, (3), - (5) result n: qvacm Vc V I d acm d I q, 2 (6) L L Equaton (6) shows that I d and I q can be ndependently controlled by q and d respectvely, whch s exploted for developng nner current control loops. III. CONVERTER CONTROLLER DESIGN The controller desgn ams are:. Symmetrcal structure (dentcal control at each port), 2. Power regulaton and optmal current (current n phase wth voltage) at each brdge at all loadngs. 3. Permanently runnng nner current control loops. A. Actve Power anagement The complex power of the two brdges s obtaned as: S P ( )( ) jq V d jv q I d ji q Vd Id VqIq j( VqId Vd Iq ),2 (7) By consderng (3)(4) and (6) and replacng nto (7): P ( VqV c ) Vc Id,2 (8) L Fg.. IGBT based LCL DC/DC converter. B. Basc Crcut Equatons The converter model s studed n the rotatng dq coordnate frame lnked wth the central capactor voltage V c as shown n Fg.. In tme doman, the two brdge AC voltages are: v ac 2V ac cos(2 f o t ),2 () where V ac, f o, and α are the AC voltage man harmonc RS, the operatng frequency, and the phase angle of v ac. The AC voltages are expressed n the phasor doman as: Vac V V cos jv sn, ac ac ac, 2 (2) V d V acm cos V acm d,2 (3) V q V acm sn V acm q,2 (4) Equaton (8) shows that actve power at each brdge can be controlled by d component of the correspondng AC current. Ths result along wth prevous concluson from (6) reveals that brdge power s controlled usng q sgnal. B. Power Balance Indcator Consderng Fg. the central capactor current s: jcv c I d ji q I 2d ji 2q (9) Substtutng (6),(8) nto (9), and rearrangng gves: K c V Cd V Cq K c ( L P P 2 L 2 C) (0) The sum actve power, P +P 2, must be equal to zero and therefore V Cq wll be ndcator of power balance and should be kept at zero. Note that keepng V Cq to zero s precondton for

3 all the equatons n the prevous secton and t s requrement for ndependent actve power flow control usng q. The reactve power balance equaton s obtaned usng (9): V C c C. Reactve Current Control Vcd V acm Vc 2 V d 2acm L L2 () It s postulated that losses strongly depend on current magntudes, usng experence from [4]. To mnmze losses, the reactve currents n the coordnate frames lnked wth the AC voltages of each brdge wll be regulated to zero. Fg. 2 shows the relatonshp between the coordnate frame algned wth AC voltages (DQ frame) and the one algned wth central capactor voltage V C (dq frame). The current relatonshp s: I D I Q I d cos( ) I q sn( ) (2) I d sn( ) I q cos( ) (3) be scaled to hgher powers. They ensure that semconductor current s lmted under all condtons ncludng DC faults and durng saturaton of external loops. The desgn equaton (0) shows that V cd must be postve, and thus d and 2d would be postve n any operatng condton too. Therefore, a lower lmt of 0.0 s mposed on d controller to avod any sngularty n q-axs reference current calculaton n (4). It s worth mentonng that q and 2q correspond to actve power flow balancng and t s crucal to avod ther saturaton. Otherwse, severe overvoltage or voltage collapse may occur on central capactor whch would be detrmental to DC/DC converter operaton. In ths way, the prorty s gven to actve power loops whle reactve current controllers are functonng only f the modulaton ndex s below, as shown n Fg. 3. Note that such overrde mght happen only durng faults. These equatons are employed n the orgnal controller n [8], and dffcultes were experenced wth real tme mplementaton on FPGA hardware because of use of 3 dfferent coordnate frames. Consderng (3),(3) and (4), and to acheve I Q =0: q Iq Id tan( ) Id ( ) (4) d Fg. 2. Relatonshp between local and central coordnate frames. Equaton (4) uses only varables n the central coordnate frame whch s of beneft n reducng real-tme computatons. D. Steady-state, closed-loop soluton If the converter parameters (C, L, L 2, V acm, V 2acm ) and desred power (P =P 2 ) are gven, t s possble to calculate 5 varables ( d, q, V c, 2d and 2q ) that defne operatng pont wth the above controls. The 5 equatons are as follows: Two power equatons for each port from (8), Reactve power balance on V c n (), Two equatons for zero reactve current at each brdge, obtaned replacng currents from (6) n (4). E. Controller Structure The proposed controller block dagram s shown n Fg. 3. The reference angle, θ, (used for the frng logc and all snglephase dq transformatons at both brdges) s obtaned from a voltage-controlled oscllator (VCO), θ=2πf o t. The coordnate frame speed s same as operatng frequency (f o =.7kHz n the prototype). No Phase Locked Loop s requred snce coordnate frame s algned wth V c as long as V cq =0. The external loops consst of actve power regulaton to a reference P ref and V cq regulaton to zero. Because of bdrectonal operaton, the average of the powers measured at two brdges s regulated. The output of each external loop s appled at both brdges to ensure equal control sharng, whch s mportant for bdrectonal operaton and durng faults. The nner current loops are essental f ths technology s to Fg. 3. The proposed controller for LCL DC/DC converter controller. F. Controller dynamcs The controller topology ensures some decouplng but reactve current control loops are non-lnear and coupled wth actve power control as seen n (4). The controller gans are tuned n PSCAD n the other of ther speed of response:. Inner d current and power balancng smultaneously, snce converter can not operate unless power s balanced. d s kept constant ntally.

4 2. Reactve current control loops. 3. Fnal tunng of flters and all gans. The feedback flters are of second order (Ƹ=0.8, and f c =300Hz). The performance of power balancng has prorty. IV. LCL DC/DC CONVERTER PROTOTYPE AND LABORATORY TEST PLATFOR A. 30 kw 200V/900V DC/DC Converter Development Fg. 4 (a) shows a photograph of the developed DC/DC converter and the man techncal aspects are summarzed: AC operatng frequency of.7 khz s selected, whch s a compromse between the weght/sze and losses [6]. Ltz wre s used for LCL nductors to mtgate skn effect at the selected operatng frequency. To decrease the total nductor sze, weght, and loss the two pole nductors are closely wound back-to-back wth a small gap n between as seen n Fg. 4(a). The selected WIA flm capactors have.2kv DC voltage ratng whch rapdly reduces wth frequency down to 250V at.7 khz. The requred 48µF per pole s obtaned usng two 96µF banks n seres. Each bank s a parallel array of 2 30 µf, 20µF, 3 5µF, and µf capactors. The low frequency modulaton rato, m f =3 s used for both brdges as AC power qualty s of less nterest compared to the effcency. A new method of PW pattern generaton s employed, whch reduces losses by forcng swtchngs at low or zero current as descrbed n [6]. VCO, PW pattern generaton, Analog-to-Dgtal Converter (ADC) sgnal converson, sngle-phase dq transformatons, control loops of both brdges, and DC/DC converter protecton logc are mplemented on a SBRIO- 9606 Natonal Instrument sngle FPGA board. Sngle-phase dq transformaton s facltated by usng an artfcal quadrature axs, whch s syntheszed by delayng the measured sgnal by /4 of the perod. The protecton nterlock s actvated by: over voltage, and over current at AC and DC sde, as well as drver level short crcut, and capactor voltages asymmetry detecton. The FPGA board s confgured to run the VCO functon at Hz usng ts hgh frequency nternal clock, whle the remanng functons are run at 00 khz frequency. B. Laboratory test platform A smplfed schematc of the developed platform for testng s shown n Fg. 4 (b) and more detals of the ntal verson are gven n [4]. A 30kW, two-level, 0kHz, PW controlled VSC provdes 200V DC, whle another 30 kw,.5khz VSC provdes 900V DC. The two VSCs control ther DC voltages whle DC/DC converter regulates power flow between the two VSCs. Subscrpt labels 200 and 900 are used wth all prototype varables correspondng to and 2 n the prevous secton. The extreme faults at DC termnals are emulated wth specal fault hardware consstng of hgh-current IGBTs and fault mpedances (R f900 = Ω, and R f200 = 50 mω). The correspondng VSC s replaced wth a resstve load whch gves 30kW (26Ω for 900V sde and.5ω for 200V sde). Due to pole asymmetres n AC nductors, AC capactors, and swtchng pulses, some crculatng currents flow through the ground connectons n the DC platform. Ths mpacts the converter effcency but can be mnmzed by ncreasng the ground loops mpedance. Therefore, the mdponts of the two VSCs are grounded through 0 Ω resstors whereas the central capactor of DC/DC s soldly grounded, as seen n Fg. 4 (b). V. EXPERIENTAL RESULTS A. Adjustng the LCL parameters The ntal converter desgn usng theoretcal study of [5] faled to acheve full power operaton. Some control varables were n saturaton, and power reversal would lead to saturaton of dfferent varables. Ths was a consequence of hgh current magntudes, whch n turn resulted from controller nablty to mnmze reactve current. Ultmately ths s attrbuted to the nternal losses whch are around 7%, and were not consdered n theoretcal modelng. Theoretcal desgn wth addtonal resstances was very challengng because of dfferent mpacts n each power drecton and because of lack of accurate values for resstances (some vary wth operatng pont and temperature change). The fnal LCL parameters are adjusted usng PSCAD smulaton and hardware testng. In practce, only nductor values can be adjusted to tune the LCL crcut. Fg. 5 shows the controller varables and currents n steady-state dependng on values of LCL nductors. For example, f the tests show that 200 s n saturaton, then we should reduce L 200 or ncrease L 900 accordng to Fg. 5 c) and d). The adjustment wll be made on ether L 200 or L 900 dependng on the current magntude on the two sdes, consderng Fg. 8 a) and b). It s also seen that the crcut s qute senstve to L 200 varaton, snce 3% L 200 change leads to 20% current change and 40% 200 change. Further testng shows that f only one power drecton s desred, then crcut can be adjusted for over 35kW average power. The capactance of LCL capactor s drectly lnked wth the maxmal power transfer, and we used around 0% larger than the theoretcal value to account for the nternal loss. The operatng frequency can also be adjusted to tune the LCL crcut but t has not been vared n ths study. The fnal parameters are shows n Table I, where the values n brackets represent the orgnal theoretcal values for comparson. B. DC/DC response to power reference step changes Fg. 6 shows the closed loop converter response n step-up and step-down modes, wth two fast power reversals appled at t=.0 s and 2.0 s. Before t=.0 s, the DC /DC converter exports 27.5 kw from 200V to 900V sde (step-up mode). At t=.0 s actve power reference s changed from 27.5 kw to - 26.5 kw wthn 200 ms to demonstrate fast power reversal capablty. Between t=.0 s and t=2.0 s the DC /DC transfers 26.5 kw from 900V to 200V VSC operatng n step-down mode. At t=2.0 s, the actve power reference s agan changed from -26.5 kw to 27.5 kw wthn 200 ms. Fg. 6 (a) and (b) show the outer loops performance. V cq s

5 Fg. 4. Laboratory bult DC system a) Developed DC/DC converter, b) Test rg schematc. Fg. 5. System varables versus LCL nductor varatons a) current magntudes for 200V sde nductor varaton, b) current magntudes for 900V sde nductor varaton, c) modulaton ndexes for 200V nductor varaton, d) modulaton ndexes for 900 V sde nductor varaton.

6 900d 200q 200d 900q Fg. 6. Expermental results P Base=30 kw, I 200-Base= 282 A, I 900-Base=63 A. frmly regulated to zero whch facltates decoupled actve power control. Fg. 6. (c) and (d) show AC current Q- axs components n the DQ frames lnked wth the voltages of each VSC brdge, demonstratng reactve current regulaton to zero at each brdge. It s seen that the converter shows satsfactory trackng of actve power reference whle keepng reactve current at zero. Fgures 5 (e) to (h) depct trackng of the four nner current control loops. Note that these currents are shown n the coordnate frame lnked wth the central capactor and consequently q components are not zero. Fg. 6 () shows modulaton ndces of both brdges and demonstrates that none s saturated durng transent or steady state condtons. The obtaned transent response s not of hghest qualty and devates from performance observed n smulaton (not reported due to lack of space). Ths has been nvestgated and t s concluded that the qualty of 200V and 900V DC bus voltages control by the external VSCs s an ssue. There s a ±0% DC voltage swng for the tests n Fg. 6, and t was not possble to further mprove DC voltage control on the sources. The steady-state AC voltages and currents at both brdges, obtaned for two dfferent power levels n each drecton, are shown n Fg. 7. As t can be seen, the voltage and current fundamental components are n phase at both brdges. It s also observed that at hgher powers, the AC voltage tends to pure square wave profle whch results n lower swtchng losses. C. DC Fault Responses The controller responses are montored for DC faults at each sde and Table I presents the steady-state values of the most mportant varables durng fault condtons. The followng conclusons are made: At faulted sde the modulaton ndex does not affect the LCL varables as ts DC lnk voltage s practcally zero. d of the non-faulted brdge saturates at 0. Ths ndcates that reactve current regulaton cannot be mantaned durng DC faults. Ths s of no concern due to short nterval of such event. The outer power loop cannot track the reference power and therefore the nner d-current reference saturates. Ths mples that V cq control loop s also neffectve durng the fault snce t operates on the actve power sgnal. Thus, some non-zero V cq results, and the control sgnal on non-faulted sde wll reach saturaton. The DC/DC converter becomes an open loop system and responds smlarly as reported n [5] and [6]. Current on non-faulted sde naturally reduces whereas the current at faulted sde margnally ncreases. In the worst case (step-down mode and fault at 200V sde) central capactor voltage ncreases by 20 % whch s well below AC capactor voltage ratng. Fg. 8 (a) shows the DC and AC voltages when a DC fault s appled at 900V DC bus for.0 s whle n step-up mode. The results demonstrate that the fault s not transferred to 200V sde. Fg. 8 (b) shows the AC currents and voltages. It s also seen that the AC current at the 200V sde decrease whle at the 900V sde t margnally ncreases. The central capactors show no overvoltage durng such extreme dsturbance. Fg. 8 (c) shows the converter AC and DC voltages when a DC fault s appled at 200V sde for.0 s whle operatng n step-down mode. Smlar to the prevous results, the fault s not transferred to 900V sde. Fg. 8 (d) shows that 200V sde current and central capactor voltage margnally ncrease, whle the non-faulted sde current decreases. As we can see n both tests, the faulted DC lnk voltages are restored after fault clearance whch demonstrates the capablty of the proposed controller n provdng fast recovery at post-fault condton. D. Effcency Analyss The converter effcency s analysed usng a loss model developed as follows: Conducton losses of power swtches are calculated by nsertng a voltage V U (representng the voltage drop), and a resstor R ON (representng the current dependency), n seres wth the IGBTs n the converter model n PSCAD. V U and R ON can be extracted from the IGBT s datasheet Swtchng losses are calculated employng the swtchng currents, dc lnk voltage and swtchng frequency n the detaled converter model n PSCAD, and usng turn-on and

7 turn-off energy curves from IGBT s datasheets. The equvalent resstance of the LCL nductors s obtaned consderng selected Ltz wres detals, number of layers, number of turns and geometry of the ar cores. Fg. 7. 200 V and 900 V AC voltages and currents n step-up and step-down modes a) P ave=7.6 kw, b) P ave =27.5 kw, c) P ave=-7.6 kw, d) P ave =-26.5kW. Fg. 8. DC fault expermental results: (a) and (b) 900V sde fault when the converter works n step up mode, (c) and (d) 200V sde fault n step down mode. Table I: Converter varable durng DC faults Fault at 200V sde Fault at 900V sde ode 900d 900q I 200ac(pu) I 900ac(pu) V c(pu) 200d 900q I 200ac(pu) I 900ac(pu) V c(pu) Step-up 0 -.22 0.43.2 0 0.32.3 0.55 Step-down 0.6 0.43.5 0-0.3.4 0.53

8 Fg. 9. The DC/DC converter effcency: a) Effcency versus power. b) Loss dstrbuton versus power, c) Effcency wth dfferent steppng ratos. Table II: Comparson between IGBT LCL DC/DC converter and thyrstor LCL DC/DC converter Specfcaton 30 kw IGBT LCL DC/DC Converter 30 kw thyrstor LCL DC/DC Converter [4] 200 V Inductor (2 requred) 94 µh,80a, 0.02Ω, 7kg, 0.00736m 3 (205 µh) 500µH,75 A,0.03Ω,3 kg, 0.0227m 3 900 V Inductor (2 requred) 380µH,40 A, 0.052Ω,3.7kg, 0.002m 3 (360 µh) 224µH,37 A,0.0375Ω,2 kg, 0.00m 3 AC capactor (2 requred) 48 µf,540 V, 2.5 kg, 0.00398 m 3 (45 µf) 40 µf,707 V,2 kg, 0.0037 m 3 Power Swtches 4 IGBT (600 V,300 A) +4 IGBT (700 V, 20A) 8 Thyrstor ((.8 kv, 270 A) + 8 Thyrstor ((.8 kv, 50 A) Operatng Frequency 700 Hz 0-580 Hz Power Densty 2.25 kw/l.76 kw/l Specfc Power.29 kw/kg. kw/kg_ Inductor losses at 200V sde 840 W (estmated) 368 W (estmated) Inductor losses at 900V sde 45 W (estmated) 20 W (estmated) Swtchng losses at 200 V sde Neglgble (estmated) 26 W (estmated) Swtchng losses at 900 V sde 90 W (estmated) 72 W (estmated) Conducton losses at 200 V sde 430 W (estmated) 456 W (estmated) Conducton losses at 900 V sde 05 W (estmated) 72 W (estmated) easured effcency (%) 93.4% (estmated total loss s 980 W) 92% (estmated total loss s 2304 W) The RCD snubber losses are gnored snce they are small. The effcency of the developed prototype s also measured for few power levels and close agreement s observed wth the estmated effcency as s shown n Fg. 9. The converter effcency at full power s around 93.4% whch s a promsng value for nomnal power of 30kW. The loss components versus loadng are shown n Fg. 9 (b). It s seen that the 200V sde swtchng loss s small because of swtchng around zero current. The Total Harmonc Dstorton (THD) of current s hgh due to low frequency modulaton ndex of 3, whch s partcularly pronounced at 900V sde and at lower power as seen n Fg. 7. The harmonc crculaton ncrease losses. The desgn optons allow some change n parameters, and studes ndcate that larger 900V sde nductor may mprove effcency, despte ncreased nductor resstance. The domnant loss component at hgh power s conducton loss of 200V sde nductor. Ths loss can be readly reduced by ncreasng cross secton of L 200 Ltz wre. If we use 270 strands of 0.45mm Ltz wre nstead of currently used 35 strands of 0.63mm, the effcency wll reach over 94.5% wth 22% ncrease n nductor weght. We have also studed the converter effcency when the converter s exposed to dfferent DC voltage levels, consderng that LCL s tuned for a partcular steppng rato. Fg. 9 (c) shows that desgn s robust aganst modest changes n steppng rato and almost same effcency s obtaned. E. Comparson wth 30kW LCL thyrstor DC/DC desgn Table II compares the power swtch characterstcs, power densty, specfc power, operatng frequency, loss components, and effcency between 30kW IGBT LCL and 30 kw thyrstor LCL DC/DC converter [4]. As t can be seen, IGBT desgn requres lower nductors and capactors. The capactance of AC capactor s reduced but the weght and volume of ths capactor bank s ncreased slghtly. Ths has been unexpected practcal result, whch s caused by capactor voltage ratng deteroraton wth frequency whch demands more seresconnected unts. However, power densty and specfc power for IGBT-based DC/DC converter have been mproved by 27% and 6% respectvely. The LCL IGBT topology needs lower number of power swtches (8 IGBT aganst 6 Thyrstors), lower ratng of the power swtches and can acheve faster and more relable power reversal. The swtchng losses of thyrstor converter are lower at 900V sde because of dscontnuous operaton but ths loss component s small. Overall, the IGBT LCL desgn shows better effcency, faster control response, wth lower volume and weght, and s a favored canddate for offshore DC applcatons. VI. CONCLUSION Ths paper frstly presents analytcal background of a

9 feedback controller for LCL IGBT DC/DC and t s concluded that the algnment of coordnate frame wth the central capactor voltage enables decoupled control of actve and reactve current. The proposed controller archtecture s sutable for mplementaton on FPGA wth hgh samplng frequency of 00kHz. The nner current regulators are provded wth the vew of scalng converter to hgher powers. The man challenges of practcal mplementaton of 30 kw, 200V/900V,.7 khz, IGBT LCL DC/DC converter are analyzed. Because of the nternal LCL crcut losses, t s essental to fnalze the LCL parameters on the prototype and a systematc method of parameter tunng s demonstrated. Expermental testng concludes satsfactory steady-state operaton and fast power reversals. Expermental DC fault tests at full power demonstrate that nternal voltages and currents are kept wthn the safe range and the controller acheves fast recovery after fault removal. The effcency studes show that whle 900V sde swtchng and conducton losses are domnant at low power, whle the 200V sde nductors are the man source of losses at hgh power range. An effcency of 93.4% s obtaned at full power but t drops at partal loadng. The possble drawbacks wth hgh-power, hgh frequency AC capactor sze are hghlghted. VII. ACKNOWLEDGEENT The authors would lke to acknowledge sgnfcant nput from Aberdeen Unversty HVDC lab techncans: A. Styles and R. Osborne, n buldng ths converter. VIII. REFERENCES [] W. Chen, A. Huang, C. L, G. Wang, W. Gu, Analyss and comparson of medum voltage hgh power DC/DC converters for offshore wnd energy systems, IEEE Trans. On Power Elec., Vol. 28, no. 4, Aprl 203, pp: 204-2023, [2] A. Parastar, J.K. Seok, Hgh-gan resonant swtched-capactor cellbased DC/DC converter for offshore wnd energy systems, IEEE Trans. On Power Elec., Vol. 30, No. 2, pp: 644-656, Feb. 205. [3] G. de Sousa and. Heldwen, Three-phase undrectonal modular multlevel converter, n Proc. 5th Europ. Conf. EPE, 203, pp. 0. [4] L. F. Costa, S. A. ussa, I. Barb ultlevel buck/boost-type DC DC converter for hgh-power and hgh-voltage applcaton, IEEE Trans. On Ind. App., Vol. 50, No. 5, pp:393-3942, Nov. 204. [5] D. Jovcc, K. Ahmed Hgh Voltage Drect Current Transmsson: Converters, Systems and DC grds, Wley-Blackwell, 205. [6] C.D. Barker, C.C. Davdson, D.R. Traner, R.S. Whtehouse Requrements of DC-DC converters to facltate large DC grds, CIGRE Pars 202, paper B4-204. [7] T K Vrana, Y Yang, D Jovcc, S Dennetère, J Jardn, H Saad, The CIGRE B4 DC Grd Test System, ELECTRA ssue 270, October 203, pp 0-9. [8] T. Luth,..C. erln, T.C. Green, F. Hassan, and C.D. Barker, Hgh-frequency operaton of a DC/AC/DC system for HVDC applcatons, IEEE Trans. On Pow. Elec., vol. 29, no. 8, pp. 407-5, Aug. 204. [9] Z. Xng, X. Ruan, H. You, X. Yang, D. Yao, and C. Yuan, "Softswtchng operaton of solated modular DC/DC converters for applcaton n HVDC grds," IEEE Trans. On Pow. Elec., vol. 3, no. 4, pp. 2753-2766, 206. [0] L ax, Desgn and Control of a DC Collecton Grd for a Wnd Farm PhD Thess, Chalmers Unversty, 2009. [] G. Ortz, J. Bela, and J. W. Kolar, "Optmzed desgn of medum frequency transformers wth hgh solaton requrements," IECON, 200, pp. 63-638. [2] X. Zhang, X. Xang, T. C. Green, and X. Yang, Operaton and Performance of Resonant odular ultlevel Converter wth Flexble Step Rato, IEEE Trans. on Indus. Elec., Early Access, DOI: 0.09/TIE.207.2677333 [3] Abdelrahman Abbas Hagar and Peter W. Lehn Comparatve evaluaton of a new famly of transformerless modular DC DC converters for hghpower applcatons, IEEE Transactons on Power Delvery, vol. 29, no., Feb.204, pp.444-452. [4]. Hajan, J. Robnson, D. Jovcc, B. Wu, 30kW, 200V/900V, thyrstor LCL DC/DC converter laboratory prototype desgn and testng, IEEE Trans. On Pow. Elec., Vol. 29, No. 3, pp: 094-02, arch 204. [5] D. Jovcc, L. Zhang, LCL DC/DC converter for DC Grds, IEEE Trans. On Pow. Delvery, Vol. 28, No. 4, pp: 207 2079, Oct. 203. [6]. Hajan, D. Jovcc 30kW, 200V/900V LCL IGBT DC/DC converter prototype desgn and testng IEEE ISGT Europe 204, Istanbul, October 204. [7] A. Jamshd Far,. Hajan Foroushan, D. Jovcc, Y. Audchya, 'Hgh power C VSC optmal desgn for DC/DC converter applcatons'. IET Power Electroncs, vol 9, no. 2. 206. [8] S.. Fazel,. Hajan, D. Jovcc, Demonstraton of 30kW IGBT LCL DC-DC converter as proof of concept for nterconnectng HVDC system nto a future DC grd, Cgre B4 colloquum, Lund, ay 205, pp. 6. IX. BIOGRAPHIES Seyed ahd Fazel receved the PhD degree from unversty of alaya, alaysa, n 203. He s currently workng as researcher wth Centre for Sustanable Power Dstrbuton at Unversty of Bath, Bath, UK. Hs man research nterests are HVDC system, flexble AC transmsson system (FACTS), nonlnear control, power electroncs, and varable-speed ac drves. Dr. Fazel s a member of the Insttuton of Engneerng and Technology and s a Chartered Engneer. Dragan Jovcc (S 06, 00, S 97) obtaned a Dploma Engneer degree n Control Engneerng from the Unversty of Belgrade, Yugoslava n 993 and a Ph.D. degree n Electrcal Engneerng from the Unversty of Auckland, New Zealand n 999. He s currently a professor wth the Unversty of Aberdeen, Scotland where he has been snce 2004. He also worked as a lecturer wth Unversty of Ulster, n the perod 2000-2004 and as a desgn Engneer n the New Zealand power ndustry n the perod 999-2000. Hs research nterests le n the FACTS, HVDC, DC grds and ntegraton of renewable sources. asood Hajan ('0) receved the B.Sc. degree from Sharf Unversty of Technology, Tehran, Iran, and the.sc. and Ph.D. degrees from Isfahan Unversty of Technology, Isfahan, Iran. asood conducted hs research n desgn and expermental development of a prototype 30kW DC grd ncludng several power electroncs converters at the Unversty of Aberdeen, Aberdeen, U.K, n the perod 20-203 where he s now workng as a lecturer. Hs man research nterests nclude power electroncs, HVDC and FACTS, electrcal machnes and drves, and nonlnear control.