ST x544 System-On-Chip Driver for 480RGBx272 TFT LCD. Datasheet. Version /06

Similar documents
Crystalfontz. Thiscontrolerdatasheetwasdownloadedfrom htp:/ NT TFT LCD Source Driver V0.6.

( DOC No. HX8678-A-DS ) HX8678-A

( DOC No. HX8615A-DS ) HX8615A

( DOC No. HX8705-B-DS ) HX8705-B

( DOC No. HX8678-B-DS )

Sep. 26, 2008 Version 0.9

( DOC No. HX8262-A-DS ) HX8262-A

80 SEGMENT DRIVER FOR DOT MATRIX LCD S6A2067

Convergence module (Driver) - Green convergence sub module

REV. 1.3 FS DS-13_EN MAY FORTUNE' Properties. Datasheet FS For wide range thermal measurement application. For Reference Only

RV-1805-C3 Application Note

128Mb Synchronous DRAM. Features High Performance: Description. REV 1.0 May, 2001 NT5SV32M4CT NT5SV16M8CT NT5SV8M16CT

DS1250Y/AB 4096k Nonvolatile SRAM

DS1250W 3.3V 4096k Nonvolatile SRAM

1 Introduction. 2 Cranking Pulse. Application Note. AN2201/D Rev. 0, 11/2001. Low Battery Cranking Pulse in Automotive Applications

Nickel Cadmium and Nickel Hydride Battery Charging Applications Using the HT48R062

DS1245Y/AB 1024k Nonvolatile SRAM

DS1230Y/AB 256k Nonvolatile SRAM

AN RPM to TACH Counts Conversion. 1 Preface. 2 Audience. 3 Overview. 4 References

Advantage Memory Corporation reserves the right to change products and specifications without notice

Engineering Innovation Center EIC. Electronic Component Selection

PC-I 04/104. Passive PC/CAN Interface HARDWARE MANUAL ENGLISH

ELM327 OBD to RS232 Interpreter

Advantage Memory Corporation reserves the right to change products and specifications without notice

Advantage Memory Corporation reserves the right to change products and specifications without notice

PROGRAMMABLE DC POWER SUPPLY MODEL 62000P SERIES

Wuxi I-CORE Electronics Co., Ltd. AIP CH SEGMENT DRIVER FOR DOT MATRIX LCD

ELM327 OBD to RS232 Interpreter

Silvertel. Ag5510. PoE Ultra Module. 1. Features. 2. Description. 60 Watt Output Power. Very small size. High efficiency DC/DC converter

DESCRIPTION FEATURES APPLICATIONS

Silvertel. Ag Features. 2 Description. Power-over-Ethernet Plus Module. IEEE802.3at and IEEE802.3af compliant. Maximum 30W output power

HYB25D256400/800AT 256-MBit Double Data Rata SDRAM

Silvertel. Ag Features. Multi-Stage Charging. Battery Reversal Protection. Reduced Power Consumption. Wide DC or AC Input Voltage Range

USER MANUAL LOAD CELL (Expansion)

Silvertel. Ag Features. 2 Description. Power-over-Ethernet Plus Module. IEEE802.3at and IEEE802.3af compliant. Maximum 30W peak output power

Owner s Manual. MG2000 Speedometer IS0211. for use with SmartCraft Tachometer

80CH SEGMENT/COMMON DRIVER FOR DOT MATRIX LCD

Yaskawa AC Drive L1000A Supplement to the L1000A Technical Manual No. SIEP C , SIEP C , and SIEP C

RAM-Type Interface for Embedded User Flash Memory

6 Axis Auto Pilot BGL 6G AP

BASIC MECHATRONICS ENGINEERING

AMX8X5 Using Low-Cost Ceramic Capacitors for RTC Backup Power

Do isolate the power supply from other high power systems such as Stereos and Alarms

DS1643/DS1643P Nonvolatile Timekeeping RAM

Linear Alignment. motion. 2 Flexible combination of XY. 4 High resolution and high responsiveness. accuracy. Optical linear encoder scale head

Silvertel. Ag Features. 2. Description. IEEE802.3bt PD Module

Silvertel. Ag Features. 2. Description. Power-Over-Ethernet Module. IEEE802.3af compliant. Small SIL and SMT package available

Norcal Power/SWR Meter Assembly & Operating Manual. Revision 1D 10/15/2008

OKI Semiconductor MD56V82160

TC59SM816/08/04BFT/BFTL-70,-75,-80

Silver T E L E C O M. 1. Features. 2. Description. IEEE802.3af compliant. Small SIL package size - 56mm (L) x 14mm (H) Low output ripple and noise

Design Specification. DDR2 UDIMM Enhanced Performance Profiles

Silvertel. Ag5500. PoE Ultra Module. 1. Features. 2. Description. Maximum 60 Watt Output Power. Small size (½ Brick) High efficiency DC/DC converter

SL Series Application Notes. SL Series - Application Notes. General Application Notes. Wire Gage & Distance to Load

Silvertel. 1. Features. 2. Description. IEEE802.3at compliant. Maximum 30 Watt Output Power. High efficiency DC/DC converter

LM3621 Single Cell Lithium-Ion Battery Charger Controller

HY2112 Datasheet. 1- Cell LiFePO4. Battery Packs Protection ICs HYCON Technology Corp. DS-HY2112-V08_EN

Electrical Engineering Design & Drawing II. Prepared By: Sanjeev Kumar Kalra Lect. in Electrical Engg. Guru Gobind Singh Govt. Polytechnic, Cheeka

Revision History. REV. 0.1 June Revision 0.0 (May, 1999) PC133 first published.

Parker Hannifin GmbH & Co. KG Tube Fittings Division Europe Am Metallwerk 9, Bielefeld Phone Fax

SPG-DIGI. Operating Instruction. Please read carefully before use!

Silvertel. Ag Features. Multi-Stage Charging. Battery Reversal Protection. Reduced Power Consumption. Wide DC or AC Input Voltage Range

Low TCR, 1mW Dual Rejustor Micro-Resistor MBD-472-AL

Advanced Power Electronics Corp.

DTM68116D 32GB Pin 2Rx4 Registered ECC DDR4 DIMM

e-ask electronic Access Security Keyless-entry

t WR = 2 CLK A2 Notes:

Wide Band Air Fuel Ratio meter (Bosch LSU 4.9 sensors)

Solid State Pressure Sensor. STX Series Model 13A FEATURES DESCRIPTION

Shrink-TSOP. M464S3323CN0 SDRAM SODIMM 32Mx64 SDRAM SODIMM based on stsop2 16Mx8, 4Banks, 4K Refresh, 3.3V SDRAMs with SPD. Pin. Front. Pin.

DQ18 DQ19 VDD DQ20 NC *VREF **CKE1 VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VDD DQ28 DQ29 DQ30 DQ31 VSS **CLK2 NC NC SDA SCL VDD

Silvertel. Ag9900M. 1. Features. 2. Description. Ultra Miniature PoE Module. Tiny SMT package (14mm x 21mm) IEEE802.3af compliant.

LET9045C. RF power transistor from the LdmoST family of n-channel enhancement-mode lateral MOSFETs. Features. Description

SDR SDRAM. MT48LC8M8A2 2 Meg x 8 x 4 Banks MT48LC4M16A2 1 Meg x 16 x 4 Banks. Features. 64Mb: x8, x16 SDRAM. Features

DS1644/DS1644P Nonvolatile Timekeeping RAM

HY2112 Datasheet. 1- Cell LiFePO4. Battery Packs Protection ICs HYCON Technology Corp. DS-HY2112-V06_EN

Mini-MAG Positioning Products

Notes: Clock Frequency (MHz) Target t RCD- t RP-CL t RCD (ns) t RP (ns) CL (ns) -6A E

Silvertel. Ag9912M Ultra Miniature PoE Module. 1. Features. 2. Description. Tiny SMT package (14mm x 21mm) IEEE802.3af compliant.

MICROPROCESSOR BASED CONTROLLER

SDRAM AS4SD8M Mb: 8 Meg x 16 SDRAM Synchronous DRAM Memory. PIN ASSIGNMENT (Top View)

TECHNICAL MANUAL FOR ELECTRONIC SPEEDOMETER STR-RIEJU MATRIX 2

PG02S Series 2W DC/DC CONVERTER, SIP-Package

Setup Tabs. Basic Setup: Advanced Setup:

Sorensen XG 1700 Series 1700 W A Watt, 1U Programmable DC Power Supplies V. Key Features. Key Modes

54ACxxxx, 54ACTxxxx. Rad-hard advanced high-speed 5 V CMOS logic series. Features. Description

Evaluates: MAX MAX44284 Evaluation Kit. General Description. Quick Start. EV Kit Contents. Features and Benefits. Required Equipment.

ABS motorcycle braking chip

ABS motorcycle braking chip

Serial Bus. Owners s Manual IS0210. for Navy Gateway GW0016

POWER SUPPLY MODEL XP-800. TWO AC VARIABLE VOLTAGES; 0-120V and 7A, PLUS UP TO 10A. Instruction Manual. Elenco Electronics, Inc.

PCT200 Powercast High-Function RFID Sensor Datalogger

Revision History Revision 1.0 (August, 2003) - First release. Revision 1.1 (February, 2004) -Corrected typo.

Using the HT13R90 in Simple Charger Applications

IS42S32200L IS45S32200L

INSTRUMENTATION & CONTROL

L300P Inverter Specifications

SPECIFICATION FSP350-60APN(85) Bronze. (Erp2013) DATE:MAY, 14, 2013 表單編號 :7000P Page1

OPERATING INSTRUCTIONS ECON-M

HYB25D256[400/800/160]B[T/C](L) 256-Mbit Double Data Rate SDRAM, Die Rev. B Data Sheet Jan. 2003, V1.1. Features. Description

Transcription:

720x544 System-On-Chip Driver for 480RGBx272 TFT LCD Datasheet Sitronix reserves the right to change the contents in this document without prior notice, please contact Sitronix to obtain the latest version of datasheet before placing your order. No responsibility is assumed by Sitronix for any infringement of patent or other rights of third parties which may result from its use. 206 Sitronix Technology Corporation. All rights reserved. Version.5 206/06 Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice.

LIST OF CONTENT. GENERAL SCRIPTION... 5 2. FEATURES... 6 3. PAD ARRANGEMENT... 7 3. Output Bump Dimension... 7 3.2 Bump Dimension... 8 3.3 Alignment Mark Dimension... 9 3.4 Chip Information... 9 4. PAD CENTER COORDINATES... 0 5. BLOCK DIAGRAM... 34 6. PIN SCRIPTION... 35 6. Pin Function... 35 7. 3-WIRE SERIAL INTERFACE... 39 8. REGISTER LIST... 40 8. Register Summary... 40 8.2 Command Table Register description... 42 8.2. R0: Direction setting... 42 8.2.2 R:... 42 8.2.3 R2: CONSTRAST... 44 8.2.4 R3: SUB-CONTRAST_R... 44 8.2.5 R4: SUB-CONTRAST_B... 44 8.2.6 R5: BRIGHTNESS... 45 8.2.7 R6: SUB-BRIGHTNESS_R... 45 8.2.8 R7: SUB-BRIGHTNESS_B... 45 8.2.9 R8: H_BLANKING... 45 8.2.0 R9: VDPOL HDPOL V_BLANKING... 46 8.2. R0: POL... 47 8.3 Command Table 2 Register description... 48 8.3. R7F: COMMAND2_ENABLE... 48 8.3.2 R20~R2F: GAMMA SELECTION... 48 8.3.3 R50: G SETTING... 50 8.3.4 R5: SETTING... 50 8.3.5 R52: SETTING... 5 8.3.6 R54:, SETTING... 52 8.3.7 R55: SOURCE OP-AMP POWER SETTING... 53 8.3.8 R5B: SOURCE EQUALIZE TIME SETTING... 53 8.3.9 R5D: LC TYPE SETTING... 55 8.3.0 R5E: GATE WIDTH SETTING... 55 Version.5 Page 2 of 89 206/06

8.3. R40: VMF OFFSET SETTING... 56 8.3.2 R4A: OTP FUNCTION CONTROL... 56 8.3.3 R4B: OTP ADDRESS SETTING... 56 8.3.4 R4C: OTP DATA SETTING... 57 8.3.5 R4D: OTP CONTROL... 57 9. ELECTRICAL SPECIFICATIONS... 58 9. Absolute Maximum Ratings... 58 9.2 DC Characteristics... 58 9.2. Recommended Operating Range... 58 9.2.2 DC Characteristics for Digital Circuit... 58 9.2.3 DC Characteristics for Analog Circuit... 59 9.3 AC Characteristics... 59 9.4 AC Timing Diagram... 60 9.4. Clock and Data Input Timing Diagram... 60 9.4.2 3-Wire Communication Timing Diagram... 60 0. INPUT DATA FORMAT... 6 0. RGB Input Timing Table... 6 0.. Parallel 24-bit RGB Timing Table... 6 0..2 Serial 8-bit RGB Timing Table... 6 0.2 SYNC Mode Timing Diagram... 62 0.3 SYNC- Mode Timing Diagram... 63 0.4 Mode Timing Diagram... 64. POWER APPLICATION CIRCUIT... 65 2. INPUT COLOR FORMAT APPLICATION CIRCIT... 66 2. 6.7M Input Color Format... 66 2.2 262K Input Color Format... 66 2.3 65K Input Color Format... 67 2.3 4K Input Color Format... 67 3. FPC APPLICATION CIRCUIT... 68 3. RGB Mode Selection Table... 68 3.2 Type A Panel (C-company panel)... 68 3.2. Parallel RGB SYNC- Mode Reference Circuit... 68 3.2.2 Parallel RGB SYNC Mode Reference Circuit... 69 3.2.3 Parallel RGB Mode Reference Circuit... 69 3.2.4 Serial RGB SYNC- Mode Reference Circuit... 70 3.2.5 Serial RGB SYNC Mode Reference Circuit... 70 3.2.6 Serial RGB Mode Reference Circuit... 7 3.3 Type B Panel (B-company panel)... 7 3.3. Parallel RGB SYNC- Mode Reference Circuit... 7 Version.5 Page 3 of 89 206/06

3.3.2 Parallel RGB SYNC Mode Reference Circuit... 72 3.3.3 Parallel RGB Mode Reference Circuit... 72 3.3.4 Serial RGB SYNC- Mode Reference Circuit... 73 3.3.5 Serial RGB SYNC Mode Reference Circuit... 73 3.3.6 Serial RGB Mode Reference Circuit... 74 3.4 Type C Panel (I-company panel)... 74 3.4. Parallel RGB SYNC- Mode Reference Circuit... 74 3.4.2 Parallel RGB SYNC Mode Reference Circuit... 75 3.4.3 Parallel RGB Mode Reference Circuit... 75 3.4.4 Serial RGB SYNC- Mode Reference Circuit... 76 3.4.5 Serial RGB SYNC Mode Reference Circuit... 76 3.4.6 Serial RGB Mode Reference Circuit... 77 4. POWER ON/OFF SEQUENCE... 78 4. Power On Sequence... 78 5. OTP Flow... 80 6. RECOMMEND PANEL ROUTING RESISTANCE... 83 7. POWER STRUCTURE... 84 7. Voltage Generation... 84 7.2 Source Voltage Relations... 85 8. COLOR FILTER ARRANGEMENT... 86 9. REVISION HISTORY... 87 Version.5 Page 4 of 89 206/06

. GENERAL SCRIPTION ST7282 ST7282 offers all-in-one chip solution of 480RGBx272 for color TFT-LCD panel. This chip incorporated with digital timing generator, source and gate driver, power supply circuit and embedded serial communication interface for function setting. The source output support real 8-bit resolution and 256-gray scale with small output deviation are designed to support higher color resolution. The power supply circuit incorporated with step-up circuit, regulators and operational amplifiers to generate power supply voltages to drive TFT LCD. Version.5 Page 5 of 89 206/06

2. FEATURES ST7282 Display Resolution: 480*RGB (H) *272(V) LCD Driver Output Circuits - Source Outputs: 720 Channels - Gate Outputs: 544 Channels - Common Electrode Output 256 gray scale with true 8 bit DAC Support SYNC, SYNC- and mode RGB interface input timing Support 8-bit serial and 24-bit parallel RGB interface Support 3- wire Serial Peripheral Interface to config and control display On Chip Build-In Circuits - DC/DC Converter - Non-Volatile (NV) Memory to store initial Register setting and factory default value - Timing Controller Wide Supply Voltage Range - I/O Voltage (I to ):.65V ~ - Analog Voltage ( to A): 3.0V ~ 3.6V - Charge pump Voltage (P to P): 3.0V ~ 3.6V On-Chip Power System - G: +4.9600 ~ +5.9680V - : -4.4800V ~ -2.9600V - Gate driver HIGH level ( to A): +3V ~ +7.5V - Gate driver LOW level ( to A): -.5V ~ -7V Optimized layout for COG Assembly Non-Volatile Memory (OTP) can only program one time for LCD calibration Design for Consumer Applications; Automotive Related Products are Excluded Version.5 Page 6 of 89 206/06

3. PAD ARRANGEMENT ST7282 3. Output Bump Dimension Version.5 Page 7 of 89 206/06

3.2 Bump Dimension Output Pads S~S720 G~44 (No.332~628) ST7282 Symbol Item Size A Bump Width 5 um B Bump Gap (Horizontal) 5 30 75um C Bump Height 00 um D Bump Gap 2 (Vertical) 30 um Input Pads (No.~33) Symbol Item Size E Bump Width 35 um F Bump Gap 24 um G Bump Height 00 um H Bump Pitch 59 um Version.5 Page 8 of 89 206/06

3.3 Alignment Mark Dimension Alignment Mark: A(X,Y)=(-9963,-235) ST7282 Alignment Mark: A2(X,Y)=(9963,-235) 20 30 30 50 20 30 30 30 20 3.4 Chip Information Chip size Chip thickness Pad Location Coordinate Origin 20200μm x730μm 300μm Pad center Chip center Version.5 Page 9 of 89 206/06

4. PAD CENTER COORDINATES ST7282 PAD No. PIN Name X Y PAD No. PIN Name X Y -9735-257 34-7788 -257 2-9676 -257 35-7729 -257 3-967 -257 36-7670 -257 4-9558 -257 37-76 -257 5-9499 -257 38-7552 -257 6-9440 -257 39-7493 -257 7-938 -257 40-7434 -257 8-9322 -257 4-7375 -257 9-9263 -257 42-736 -257 0-9204 -257 43-7257 -257-945 -257 44-798 -257 2-9086 -257 45-739 -257 3-9027 -257 46-7080 -257 4-8968 -257 47-702 -257 5-8909 -257 48-6962 -257 6-8850 -257 49-6903 -257 7-879 -257 50-6844 -257 8 G -8732-257 5-6785 -257 9 G -8673-257 52-6726 -257 20 G -864-257 53-6667 -257 2 G -8555-257 54-6608 -257 22 G -8496-257 55-6549 -257 23 G -8437-257 56-6490 -257 24-8378 -257 57-643 -257 25-839 -257 58-6372 -257 26-8260 -257 59-633 -257 27-820 -257 60 I -6254-257 28-842 -257 6 I -695-257 29-8083 -257 62 I -636-257 30-8024 -257 63 I -6077-257 3-7965 -257 64 I -608-257 32-7906 -257 65 I -5959-257 33-7847 -257 66-5900 -257 Version.5 Page 0 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 67-584 -257 0 VDIR -3835-257 68-5782 -257 02 VDIR -3776-257 69-5723 -257 03 TEST_IN3-377 -257 70-5664 -257 04 TEST_IN3-3658 -257 7-5605 -257 05 TEST_IN4-3599 -257 72-5546 -257 06 TEST_IN4-3540 -257 73-5487 -257 07-348 -257 74-5428 -257 08-3422 -257 75-5369 -257 09-3363 -257 76-530 -257 0-3304 -257 77-525 -257-3245 -257 78-592 -257 2-386 -257 79-533 -257 3-327 -257 80-5074 -257 4-3068 -257 8 VDPOL -505-257 5 TEST_IN5-3009 -257 82 VDPOL -4956-257 6 TEST_IN5-2950 -257 83 HDPOL -4897-257 7-289 -257 84 HDPOL -4838-257 8-2832 -257 85 POL -4779-257 9 SYNC -2773-257 86 POL -4720-257 20 SYNC -274-257 87 SBGR -466-257 2-2655 -257 88 SBGR -4602-257 22-2596 -257 89-4543 -257 23-2537 -257 90-4484 -257 24-2478 -257 9-4425 -257 25-249 -257 92-4366 -257 26 DR7-2360 -257 93-4307 -257 27 DR7-230 -257 94-4248 -257 28 DR6-2242 -257 95 PARA_SERI -489-257 29 DR6-283 -257 96 PARA_SERI -430-257 30 DR5-224 -257 97-407 -257 3 DR5-2065 -257 98-402 -257 32 DR4-2006 -257 99 HDIR -3953-257 33 DR4-947 -257 00 HDIR -3894-257 34 DR3-888 -257 Version.5 Page of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 35 DR3-829 -257 69 DB2 77-257 36 DR2-770 -257 70 DB 236-257 37 DR2-7 -257 7 DB 295-257 38 DR -652-257 72 DB0 354-257 39 DR -593-257 73 DB0 43-257 40 DR0-534 -257 74 472-257 4 DR0-475 -257 75 53-257 42 D -46-257 76 590-257 43 D -357-257 77 649-257 44 D -298-257 78 708-257 45 D -239-257 79 TESTOUT0 767-257 46 D -80-257 80 TESTOUT 826-257 47 D -2-257 8 TESTOUT2 885-257 48 D -062-257 82 TESTOUT3 944-257 49 D -003-257 83 TESTOUT4 003-257 50 D -944-257 84 TESTOUT5 062-257 5 D -885-257 85 TESTOUT6 2-257 52 D -826-257 86 TESTOUT7 80-257 53 D -767-257 87 TEST_IN0 239-257 54 DG -708-257 88 TEST_IN 298-257 55 DG -649-257 89 TEST_IN2 357-257 56 D -590-257 90 46-257 57 D -53-257 9 475-257 58 DB7-472 -257 92 534-257 59 DB7-43 -257 93 593-257 60 DB6-354 -257 94 652-257 6 DB6-295 -257 95 7-257 62 DB5-236 -257 96 770-257 63 DB5-77 -257 97 829-257 64 DB4-8 -257 98 888-257 65 DB4-59 -257 99 947-257 66 DB3 0-257 200 2006-257 67 DB3 59-257 20 2065-257 68 DB2 8-257 202 224-257 Version.5 Page 2 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 203 283-257 237 489-257 204 2242-257 238 4248-257 205 230-257 239 4307-257 206 2360-257 240 4366-257 207 249-257 24 4425-257 208 2478-257 242 A 4484-257 209 2537-257 243 A 4543-257 20 2596-257 244 A 4602-257 2 2655-257 245 A 466-257 22 274-257 246 A 4720-257 23 2773-257 247 A 4779-257 24 2832-257 248 A 4838-257 25 289-257 249 A 4897-257 26 2950-257 250 P 4956-257 27 A 3009-257 25 P 505-257 28 A 3068-257 252 P 5074-257 29 A 327-257 253 P 533-257 220 A 386-257 254 P 592-257 22 A 3245-257 255 P 525-257 222 A 3304-257 256 P 530-257 223 A 3363-257 257 P 5369-257 224 3422-257 258 5428-257 225 348-257 259 5487-257 226 3540-257 260 5546-257 227 3599-257 26 5605-257 228 3658-257 262 A 5664-257 229 377-257 263 A 5723-257 230 3776-257 264 A 5782-257 23 3835-257 265 A 584-257 232 3894-257 266 A 5900-257 233 3953-257 267 A 5959-257 234 402-257 268 608-257 235 407-257 269 6077-257 236 430-257 270 636-257 Version.5 Page 3 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 27 695-257 305 TESTOUT3 820-257 272 6254-257 306 8260-257 273 633-257 307 839-257 274 6372-257 308 8378-257 275 643-257 309 8437-257 276 6490-257 30 8496-257 277 6549-257 3 8555-257 278 6608-257 32 TESTOUT4 864-257 279 6667-257 33 TESTOUT4 8673-257 280 TESTOUT 6726-257 34 TESTOUT4 8732-257 28 TESTOUT 6785-257 35 TESTOUT4 879-257 282 TESTOUT 6844-257 36 TESTOUT4 8850-257 283 TESTOUT 6903-257 37 TESTOUT4 8909-257 284 TESTOUT 6962-257 38 TESTOUT5 8968-257 285 TESTOUT 702-257 39 TESTOUT5 9027-257 286 P 7080-257 320 TESTOUT5 9086-257 287 P 739-257 32 TESTOUT5 945-257 288 P 798-257 322 TESTOUT5 9204-257 289 P 7257-257 323 TESTOUT5 9263-257 290 P 736-257 324 9322-257 29 P 7375-257 325 938-257 292 P 7434-257 326 9440-257 293 P 7493-257 327 9499-257 294 7552-257 328 9558-257 295 76-257 329 967-257 296 7670-257 330 9676-257 297 7729-257 33 9735-257 298 7788-257 332 9945 27 299 7847-257 333 9930 257 300 TESTOUT3 7906-257 334 9900 27 30 TESTOUT3 7965-257 335 9885 257 302 TESTOUT3 8024-257 336 9870 27 303 TESTOUT3 8083-257 337 G8 9855 257 304 TESTOUT3 842-257 338 9840 27 Version.5 Page 4 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 339 9825 257 373 G80 935 257 340 980 27 374 G82 9300 27 34 9795 257 375 G84 9285 257 342 G8 9780 27 376 G86 9270 27 343 0 9765 257 377 G88 9255 257 344 2 9750 27 378 G90 9240 27 345 4 9735 257 379 G92 9225 257 346 6 9720 27 380 G94 920 27 347 8 9705 257 38 G96 995 257 348 0 9690 27 382 G98 980 27 349 2 9675 257 383 0 965 257 350 4 9660 27 384 2 950 27 35 6 9645 257 385 4 935 257 352 8 9630 27 386 6 920 27 353 0 965 257 387 8 905 257 354 2 9600 27 388 9090 27 355 4 9585 257 389 9075 257 356 6 9570 27 390 9060 27 357 8 9555 257 39 9045 257 358 0 9540 27 392 G8 9030 27 359 2 9525 257 393 0 905 257 360 4 950 27 394 2 9000 27 36 6 9495 257 395 4 8985 257 362 8 9480 27 396 6 8970 27 363 0 9465 257 397 8 8955 257 364 2 9450 27 398 0 8940 27 365 4 9435 257 399 2 8925 257 366 6 9420 27 400 4 890 27 367 8 9405 257 40 6 8895 257 368 0 9390 27 402 8 8880 27 369 2 9375 257 403 0 8865 257 370 4 9360 27 404 2 8850 27 37 6 9345 257 405 4 8835 257 372 8 9330 27 406 6 8820 27 Version.5 Page 5 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 407 8 8805 257 44 6 8295 257 408 0 8790 27 442 8 8280 27 409 2 8775 257 443 20 8265 257 40 4 8760 27 444 22 8250 27 4 6 8745 257 445 24 8235 257 42 8 8730 27 446 26 8220 27 43 0 875 257 447 28 8205 257 44 2 8700 27 448 30 890 27 45 4 8685 257 449 32 875 257 46 6 8670 27 450 34 860 27 47 8 8655 257 45 36 845 257 48 0 8640 27 452 38 830 27 49 2 8625 257 453 40 85 257 420 4 860 27 454 42 800 27 42 6 8595 257 455 44 8085 257 422 8 8580 27 456 46 8070 27 423 G80 8565 257 457 48 8055 257 424 G82 8550 27 458 50 8040 27 425 G84 8535 257 459 52 8025 257 426 G86 8520 27 460 54 800 27 427 G88 8505 257 46 56 7995 257 428 G90 8490 27 462 58 7980 27 429 G92 8475 257 463 60 7965 257 430 G94 8460 27 464 62 7950 27 43 G96 8445 257 465 64 7935 257 432 G98 8430 27 466 66 7920 27 433 00 845 257 467 68 7905 257 434 02 8400 27 468 70 7890 27 435 04 8385 257 469 72 7875 257 436 06 8370 27 470 74 7860 27 437 08 8355 257 47 76 7845 257 438 0 8340 27 472 78 7830 27 439 2 8325 257 473 80 785 257 440 4 830 27 474 82 7800 27 Version.5 Page 6 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 475 84 7785 257 509 52 7275 257 476 86 7770 27 50 54 7260 27 477 88 7755 257 5 56 7245 257 478 90 7740 27 52 58 7230 27 479 92 7725 257 53 60 725 257 480 94 770 27 54 62 7200 27 48 96 7695 257 55 64 785 257 482 98 7680 27 56 66 770 27 483 00 7665 257 57 68 755 257 484 02 7650 27 58 70 740 27 485 04 7635 257 59 72 725 257 486 06 7620 27 520 74 70 27 487 08 7605 257 52 76 7095 257 488 0 7590 27 522 78 7080 27 489 2 7575 257 523 80 7065 257 490 4 7560 27 524 82 7050 27 49 6 7545 257 525 84 7035 257 492 8 7530 27 526 86 7020 27 493 20 755 257 527 88 7005 257 494 22 7500 27 528 90 6990 27 495 24 7485 257 529 92 6975 257 496 26 7470 27 530 94 6960 27 497 28 7455 257 53 96 6945 257 498 30 7440 27 532 98 6930 27 499 32 7425 257 533 00 695 257 500 34 740 27 534 02 6900 27 50 36 7395 257 535 04 6885 257 502 38 7380 27 536 06 6870 27 503 40 7365 257 537 08 6855 257 504 42 7350 27 538 0 6840 27 505 44 7335 257 539 2 6825 257 506 46 7320 27 540 4 680 27 507 48 7305 257 54 6 6795 257 508 50 7290 27 542 8 6780 27 Version.5 Page 7 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 543 20 6765 257 577 88 6255 257 544 22 6750 27 578 90 6240 27 545 24 6735 257 579 92 6225 257 546 26 6720 27 580 94 620 27 547 28 6705 257 58 96 695 257 548 30 6690 27 582 98 680 27 549 32 6675 257 583 00 665 257 550 34 6660 27 584 02 650 27 55 36 6645 257 585 04 635 257 552 38 6630 27 586 06 620 27 553 40 665 257 587 08 605 257 554 42 6600 27 588 0 6090 27 555 44 6585 257 589 2 6075 257 556 46 6570 27 590 4 6060 27 557 48 6555 257 59 6 6045 257 558 50 6540 27 592 8 6030 27 559 52 6525 257 593 20 605 257 560 54 650 27 594 22 6000 27 56 56 6495 257 595 24 5985 257 562 58 6480 27 596 26 5970 27 563 60 6465 257 597 28 5955 257 564 62 6450 27 598 30 5940 27 565 64 6435 257 599 32 5925 257 566 66 6420 27 600 34 590 27 567 68 6405 257 60 36 5895 257 568 70 6390 27 602 38 5880 27 569 72 6375 257 603 40 5865 257 570 74 6360 27 604 42 5850 27 57 76 6345 257 605 44 5835 257 572 78 6330 27 606 5760 27 573 80 635 257 607 5745 257 574 82 6300 27 608 5730 27 575 84 6285 257 609 575 257 576 86 6270 27 60 5700 27 Version.5 Page 8 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 6 5685 257 645 S34 55 257 62 S 560 27 646 S35 500 27 63 S2 5595 257 647 S36 5085 257 64 S3 5580 27 648 S37 5070 27 65 S4 5565 257 649 S38 5055 257 66 S5 5550 27 650 S39 5040 27 67 S6 5535 257 65 S40 5025 257 68 S7 5520 27 652 S4 500 27 69 S8 5505 257 653 S42 4995 257 620 S9 5490 27 654 S43 4980 27 62 S0 5475 257 655 S44 4965 257 622 S 5460 27 656 S45 4950 27 623 S2 5445 257 657 S46 4935 257 624 S3 5430 27 658 S47 4920 27 625 S4 545 257 659 S48 4905 257 626 S5 5400 27 660 S49 4890 27 627 S6 5385 257 66 S50 4875 257 628 S7 5370 27 662 S5 4860 27 629 S8 5355 257 663 S52 4845 257 630 S9 5340 27 664 S53 4830 27 63 S20 5325 257 665 S54 485 257 632 S2 530 27 666 S55 4800 27 633 S22 5295 257 667 S56 4785 257 634 S23 5280 27 668 S57 4770 27 635 S24 5265 257 669 S58 4755 257 636 S25 5250 27 670 S59 4740 27 637 S26 5235 257 67 S60 4725 257 638 S27 5220 27 672 S6 470 27 639 S28 5205 257 673 S62 4695 257 640 S29 590 27 674 S63 4680 27 64 S30 575 257 675 S64 4665 257 642 S3 560 27 676 S65 4650 27 643 S32 545 257 677 S66 4635 257 644 S33 530 27 678 S67 4620 27 Version.5 Page 9 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 679 S68 4605 257 73 S02 4095 257 680 S69 4590 27 74 S03 4080 27 68 S70 4575 257 75 S04 4065 257 682 S7 4560 27 76 S05 4050 27 683 S72 4545 257 77 S06 4035 257 684 S73 4530 27 78 S07 4020 27 685 S74 455 257 79 S08 4005 257 686 S75 4500 27 720 S09 3990 27 687 S76 4485 257 72 S0 3975 257 688 S77 4470 27 722 S 3960 27 689 S78 4455 257 723 S2 3945 257 690 S79 4440 27 724 S3 3930 27 69 S80 4425 257 725 S4 395 257 692 S8 440 27 726 S5 3900 27 693 S82 4395 257 727 S6 3885 257 694 S83 4380 27 728 S7 3870 27 695 S84 4365 257 729 S8 3855 257 696 S85 4350 27 730 S9 3840 27 697 S86 4335 257 73 S20 3825 257 698 S87 4320 27 732 S2 380 27 699 S88 4305 257 733 S22 3795 257 700 S89 4290 27 734 S23 3780 27 70 S90 4275 257 735 S24 3765 257 702 S9 4260 27 736 S25 3750 27 703 S92 4245 257 737 S26 3735 257 704 S93 4230 27 738 S27 3720 27 705 S94 425 257 739 S28 3705 257 706 S95 4200 27 740 S29 3690 27 707 S96 485 257 74 S30 3675 257 708 S97 470 27 742 S3 3660 27 709 S98 455 257 743 S32 3645 257 70 S99 440 27 744 S33 3630 27 7 S00 425 257 745 S34 365 257 72 S0 40 27 746 S35 3600 27 Version.5 Page 20 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 747 S36 3585 257 78 S70 3075 257 748 S37 3570 27 782 S7 3060 27 749 S38 3555 257 783 S72 3045 257 750 S39 3540 27 784 S73 3030 27 75 S40 3525 257 785 S74 305 257 752 S4 350 27 786 S75 3000 27 753 S42 3495 257 787 S76 2985 257 754 S43 3480 27 788 S77 2970 27 755 S44 3465 257 789 S78 2955 257 756 S45 3450 27 790 S79 2940 27 757 S46 3435 257 79 S80 2925 257 758 S47 3420 27 792 S8 290 27 759 S48 3405 257 793 S82 2895 257 760 S49 3390 27 794 S83 2880 27 76 S50 3375 257 795 S84 2865 257 762 S5 3360 27 796 S85 2850 27 763 S52 3345 257 797 S86 2835 257 764 S53 3330 27 798 S87 2820 27 765 S54 335 257 799 S88 2805 257 766 S55 3300 27 800 S89 2790 27 767 S56 3285 257 80 S90 2775 257 768 S57 3270 27 802 S9 2760 27 769 S58 3255 257 803 S92 2745 257 770 S59 3240 27 804 S93 2730 27 77 S60 3225 257 805 S94 275 257 772 S6 320 27 806 S95 2700 27 773 S62 395 257 807 S96 2685 257 774 S63 380 27 808 S97 2670 27 775 S64 365 257 809 S98 2655 257 776 S65 350 27 80 S99 2640 27 777 S66 335 257 8 S200 2625 257 778 S67 320 27 82 S20 260 27 779 S68 305 257 83 S202 2595 257 780 S69 3090 27 84 S203 2580 27 Version.5 Page 2 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 85 S204 2565 257 849 S238 2055 257 86 S205 2550 27 850 S239 2040 27 87 S206 2535 257 85 S240 2025 257 88 S207 2520 27 852 S24 200 27 89 S208 2505 257 853 S242 995 257 820 S209 2490 27 854 S243 980 27 82 S20 2475 257 855 S244 965 257 822 S2 2460 27 856 S245 950 27 823 S22 2445 257 857 S246 935 257 824 S23 2430 27 858 S247 920 27 825 S24 245 257 859 S248 905 257 826 S25 2400 27 860 S249 890 27 827 S26 2385 257 86 S250 875 257 828 S27 2370 27 862 S25 860 27 829 S28 2355 257 863 S252 845 257 830 S29 2340 27 864 S253 830 27 83 S220 2325 257 865 S254 85 257 832 S22 230 27 866 S255 800 27 833 S222 2295 257 867 S256 785 257 834 S223 2280 27 868 S257 770 27 835 S224 2265 257 869 S258 755 257 836 S225 2250 27 870 S259 740 27 837 S226 2235 257 87 S260 725 257 838 S227 2220 27 872 S26 70 27 839 S228 2205 257 873 S262 695 257 840 S229 290 27 874 S263 680 27 84 S230 275 257 875 S264 665 257 842 S23 260 27 876 S265 650 27 843 S232 245 257 877 S266 635 257 844 S233 230 27 878 S267 620 27 845 S234 25 257 879 S268 605 257 846 S235 200 27 880 S269 590 27 847 S236 2085 257 88 S270 575 257 848 S237 2070 27 882 S27 560 27 Version.5 Page 22 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 883 S272 545 257 97 S306 035 257 884 S273 530 27 98 S307 020 27 885 S274 55 257 99 S308 005 257 886 S275 500 27 920 S309 990 27 887 S276 485 257 92 S30 975 257 888 S277 470 27 922 S3 960 27 889 S278 455 257 923 S32 945 257 890 S279 440 27 924 S33 930 27 89 S280 425 257 925 S34 95 257 892 S28 40 27 926 S35 900 27 893 S282 395 257 927 S36 885 257 894 S283 380 27 928 S37 870 27 895 S284 365 257 929 S38 855 257 896 S285 350 27 930 S39 840 27 897 S286 335 257 93 S320 825 257 898 S287 320 27 932 S32 80 27 899 S288 305 257 933 S322 795 257 900 S289 290 27 934 S323 780 27 90 S290 275 257 935 S324 765 257 902 S29 260 27 936 S325 750 27 903 S292 245 257 937 S326 735 257 904 S293 230 27 938 S327 720 27 905 S294 25 257 939 S328 705 257 906 S295 200 27 940 S329 690 27 907 S296 85 257 94 S330 675 257 908 S297 70 27 942 S33 660 27 909 S298 55 257 943 S332 645 257 90 S299 40 27 944 S333 630 27 9 S300 25 257 945 S334 65 257 92 S30 0 27 946 S335 600 27 93 S302 095 257 947 S336 585 257 94 S303 080 27 948 S337 570 27 95 S304 065 257 949 S338 555 257 96 S305 050 27 950 S339 540 27 Version.5 Page 23 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 95 S340 525 257 985 S367-05 257 952 S34 50 27 986 S368-20 27 953 S342 495 257 987 S369-35 257 954 S343 480 27 988 S370-50 27 955 S344 465 257 989 S37-65 257 956 S345 450 27 990 S372-80 27 957 S346 435 257 99 S373-95 257 958 S347 420 27 992 S374-20 27 959 S348 405 257 993 S375-225 257 960 S349 390 27 994 S376-240 27 96 S350 375 257 995 S377-255 257 962 S35 360 27 996 S378-270 27 963 S352 345 257 997 S379-285 257 964 S353 330 27 998 S380-300 27 965 S354 35 257 999 S38-35 257 966 S355 300 27 000 S382-330 27 967 S356 285 257 00 S383-345 257 968 S357 270 27 002 S384-360 27 969 S358 255 257 003 S385-375 257 970 S359 240 27 004 S386-390 27 97 S360 225 257 005 S387-405 257 972 50 27 006 S388-420 27 973 35 257 007 S389-435 257 974 20 27 008 S390-450 27 975 05 257 009 S39-465 257 976 90 27 00 S392-480 27 977 75 257 0 S393-495 257 978 60 27 02 S394-50 27 979 S36-5 257 03 S395-525 257 980 S362-30 27 04 S396-540 27 98 S363-45 257 05 S397-555 257 982 S364-60 27 06 S398-570 27 983 S365-75 257 07 S399-585 257 984 S366-90 27 08 S400-600 27 Version.5 Page 24 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 09 S40-65 257 053 S435-25 257 020 S402-630 27 054 S436-40 27 02 S403-645 257 055 S437-55 257 022 S404-660 27 056 S438-70 27 023 S405-675 257 057 S439-85 257 024 S406-690 27 058 S440-200 27 025 S407-705 257 059 S44-25 257 026 S408-720 27 060 S442-230 27 027 S409-735 257 06 S443-245 257 028 S40-750 27 062 S444-260 27 029 S4-765 257 063 S445-275 257 030 S42-780 27 064 S446-290 27 03 S43-795 257 065 S447-305 257 032 S44-80 27 066 S448-320 27 033 S45-825 257 067 S449-335 257 034 S46-840 27 068 S450-350 27 035 S47-855 257 069 S45-365 257 036 S48-870 27 070 S452-380 27 037 S49-885 257 07 S453-395 257 038 S420-900 27 072 S454-40 27 039 S42-95 257 073 S455-425 257 040 S422-930 27 074 S456-440 27 04 S423-945 257 075 S457-455 257 042 S424-960 27 076 S458-470 27 043 S425-975 257 077 S459-485 257 044 S426-990 27 078 S460-500 27 045 S427-005 257 079 S46-55 257 046 S428-020 27 080 S462-530 27 047 S429-035 257 08 S463-545 257 048 S430-050 27 082 S464-560 27 049 S43-065 257 083 S465-575 257 050 S432-080 27 084 S466-590 27 05 S433-095 257 085 S467-605 257 052 S434-0 27 086 S468-620 27 Version.5 Page 25 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 087 S469-635 257 2 S503-245 257 088 S470-650 27 22 S504-260 27 089 S47-665 257 23 S505-275 257 090 S472-680 27 24 S506-290 27 09 S473-695 257 25 S507-2205 257 092 S474-70 27 26 S508-2220 27 093 S475-725 257 27 S509-2235 257 094 S476-740 27 28 S50-2250 27 095 S477-755 257 29 S5-2265 257 096 S478-770 27 30 S52-2280 27 097 S479-785 257 3 S53-2295 257 098 S480-800 27 32 S54-230 27 099 S48-85 257 33 S55-2325 257 00 S482-830 27 34 S56-2340 27 0 S483-845 257 35 S57-2355 257 02 S484-860 27 36 S58-2370 27 03 S485-875 257 37 S59-2385 257 04 S486-890 27 38 S520-2400 27 05 S487-905 257 39 S52-245 257 06 S488-920 27 40 S522-2430 27 07 S489-935 257 4 S523-2445 257 08 S490-950 27 42 S524-2460 27 09 S49-965 257 43 S525-2475 257 0 S492-980 27 44 S526-2490 27 S493-995 257 45 S527-2505 257 2 S494-200 27 46 S528-2520 27 3 S495-2025 257 47 S529-2535 257 4 S496-2040 27 48 S530-2550 27 5 S497-2055 257 49 S53-2565 257 6 S498-2070 27 50 S532-2580 27 7 S499-2085 257 5 S533-2595 257 8 S500-200 27 52 S534-260 27 9 S50-25 257 53 S535-2625 257 20 S502-230 27 54 S536-2640 27 Version.5 Page 26 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 55 S537-2655 257 89 S57-365 257 56 S538-2670 27 90 S572-380 27 57 S539-2685 257 9 S573-395 257 58 S540-2700 27 92 S574-320 27 59 S54-275 257 93 S575-3225 257 60 S542-2730 27 94 S576-3240 27 6 S543-2745 257 95 S577-3255 257 62 S544-2760 27 96 S578-3270 27 63 S545-2775 257 97 S579-3285 257 64 S546-2790 27 98 S580-3300 27 65 S547-2805 257 99 S58-335 257 66 S548-2820 27 200 S582-3330 27 67 S549-2835 257 20 S583-3345 257 68 S550-2850 27 202 S584-3360 27 69 S55-2865 257 203 S585-3375 257 70 S552-2880 27 204 S586-3390 27 7 S553-2895 257 205 S587-3405 257 72 S554-290 27 206 S588-3420 27 73 S555-2925 257 207 S589-3435 257 74 S556-2940 27 208 S590-3450 27 75 S557-2955 257 209 S59-3465 257 76 S558-2970 27 20 S592-3480 27 77 S559-2985 257 2 S593-3495 257 78 S560-3000 27 22 S594-350 27 79 S56-305 257 23 S595-3525 257 80 S562-3030 27 24 S596-3540 27 8 S563-3045 257 25 S597-3555 257 82 S564-3060 27 26 S598-3570 27 83 S565-3075 257 27 S599-3585 257 84 S566-3090 27 28 S600-3600 27 85 S567-305 257 29 S60-365 257 86 S568-320 27 220 S602-3630 27 87 S569-335 257 22 S603-3645 257 88 S570-350 27 222 S604-3660 27 Version.5 Page 27 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 223 S605-3675 257 257 S639-485 257 224 S606-3690 27 258 S640-4200 27 225 S607-3705 257 259 S64-425 257 226 S608-3720 27 260 S642-4230 27 227 S609-3735 257 26 S643-4245 257 228 S60-3750 27 262 S644-4260 27 229 S6-3765 257 263 S645-4275 257 230 S62-3780 27 264 S646-4290 27 23 S63-3795 257 265 S647-4305 257 232 S64-380 27 266 S648-4320 27 233 S65-3825 257 267 S649-4335 257 234 S66-3840 27 268 S650-4350 27 235 S67-3855 257 269 S65-4365 257 236 S68-3870 27 270 S652-4380 27 237 S69-3885 257 27 S653-4395 257 238 S620-3900 27 272 S654-440 27 239 S62-395 257 273 S655-4425 257 240 S622-3930 27 274 S656-4440 27 24 S623-3945 257 275 S657-4455 257 242 S624-3960 27 276 S658-4470 27 243 S625-3975 257 277 S659-4485 257 244 S626-3990 27 278 S660-4500 27 245 S627-4005 257 279 S66-455 257 246 S628-4020 27 280 S662-4530 27 247 S629-4035 257 28 S663-4545 257 248 S630-4050 27 282 S664-4560 27 249 S63-4065 257 283 S665-4575 257 250 S632-4080 27 284 S666-4590 27 25 S633-4095 257 285 S667-4605 257 252 S634-40 27 286 S668-4620 27 253 S635-425 257 287 S669-4635 257 254 S636-440 27 288 S670-4650 27 255 S637-455 257 289 S67-4665 257 256 S638-470 27 290 S672-4680 27 Version.5 Page 28 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 29 S673-4695 257 325 S707-5205 257 292 S674-470 27 326 S708-5220 27 293 S675-4725 257 327 S709-5235 257 294 S676-4740 27 328 S70-5250 27 295 S677-4755 257 329 S7-5265 257 296 S678-4770 27 330 S72-5280 27 297 S679-4785 257 33 S73-5295 257 298 S680-4800 27 332 S74-530 27 299 S68-485 257 333 S75-5325 257 300 S682-4830 27 334 S76-5340 27 30 S683-4845 257 335 S77-5355 257 302 S684-4860 27 336 S78-5370 27 303 S685-4875 257 337 S79-5385 257 304 S686-4890 27 338 S720-5400 27 305 S687-4905 257 339 A -5475 257 306 S688-4920 27 340 A -5490 27 307 S689-4935 257 34 A -5505 257 308 S690-4950 27 342 A -5520 27 309 S69-4965 257 343 A -5535 257 30 S692-4980 27 344 A -5550 27 3 S693-4995 257 345 A -5565 257 32 S694-500 27 346 A -5580 27 33 S695-5025 257 347 A -5595 257 34 S696-5040 27 348 A -560 27 35 S697-5055 257 349-5685 257 36 S698-5070 27 350-5700 27 37 S699-5085 257 35-575 257 38 S700-500 27 352-5730 27 39 S70-55 257 353-5745 257 320 S702-530 27 354-5760 27 32 S703-545 257 355 43-5835 257 322 S704-560 27 356 4-5850 27 323 S705-575 257 357 39-5865 257 324 S706-590 27 358 37-5880 27 Version.5 Page 29 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 359 35-5895 257 393 67-6405 257 360 33-590 27 394 65-6420 27 36 3-5925 257 395 63-6435 257 362 29-5940 27 396 6-6450 27 363 27-5955 257 397 59-6465 257 364 25-5970 27 398 57-6480 27 365 23-5985 257 399 55-6495 257 366 2-6000 27 400 53-650 27 367 9-605 257 40 5-6525 257 368 7-6030 27 402 49-6540 27 369 5-6045 257 403 47-6555 257 370 3-6060 27 404 45-6570 27 37-6075 257 405 43-6585 257 372 09-6090 27 406 4-6600 27 373 07-605 257 407 39-665 257 374 05-620 27 408 37-6630 27 375 03-635 257 409 35-6645 257 376 0-650 27 40 33-6660 27 377 99-665 257 4 3-6675 257 378 97-680 27 42 29-6690 27 379 95-695 257 43 27-6705 257 380 93-620 27 44 25-6720 27 38 9-6225 257 45 23-6735 257 382 89-6240 27 46 2-6750 27 383 87-6255 257 47 9-6765 257 384 85-6270 27 48 7-6780 27 385 83-6285 257 49 5-6795 257 386 8-6300 27 420 3-680 27 387 79-635 257 42-6825 257 388 77-6330 27 422 09-6840 27 389 75-6345 257 423 07-6855 257 390 73-6360 27 424 05-6870 27 39 7-6375 257 425 03-6885 257 392 69-6390 27 426 0-6900 27 Version.5 Page 30 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 427 99-695 257 46 3-7425 257 428 97-6930 27 462 29-7440 27 429 95-6945 257 463 27-7455 257 430 93-6960 27 464 25-7470 27 43 9-6975 257 465 23-7485 257 432 89-6990 27 466 2-7500 27 433 87-7005 257 467 9-755 257 434 85-7020 27 468 7-7530 27 435 83-7035 257 469 5-7545 257 436 8-7050 27 470 3-7560 27 437 79-7065 257 47-7575 257 438 77-7080 27 472 09-7590 27 439 75-7095 257 473 07-7605 257 440 73-70 27 474 05-7620 27 44 7-725 257 475 03-7635 257 442 69-740 27 476 0-7650 27 443 67-755 257 477 99-7665 257 444 65-770 27 478 97-7680 27 445 63-785 257 479 95-7695 257 446 6-7200 27 480 93-770 27 447 59-725 257 48 9-7725 257 448 57-7230 27 482 89-7740 27 449 55-7245 257 483 87-7755 257 450 53-7260 27 484 85-7770 27 45 5-7275 257 485 83-7785 257 452 49-7290 27 486 8-7800 27 453 47-7305 257 487 79-785 257 454 45-7320 27 488 77-7830 27 455 43-7335 257 489 75-7845 257 456 4-7350 27 490 73-7860 27 457 39-7365 257 49 7-7875 257 458 37-7380 27 492 69-7890 27 459 35-7395 257 493 67-7905 257 460 33-740 27 494 65-7920 27 Version.5 Page 3 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 495 63-7935 257 529 G95-8445 257 496 6-7950 27 530 G93-8460 27 497 59-7965 257 53 G9-8475 257 498 57-7980 27 532 G89-8490 27 499 55-7995 257 533 G87-8505 257 500 53-800 27 534 G85-8520 27 50 5-8025 257 535 G83-8535 257 502 49-8040 27 536 G8-8550 27 503 47-8055 257 537 9-8565 257 504 45-8070 27 538 7-8580 27 505 43-8085 257 539 5-8595 257 506 4-800 27 540 3-860 27 507 39-85 257 54-8625 257 508 37-830 27 542 9-8640 27 509 35-845 257 543 7-8655 257 50 33-860 27 544 5-8670 27 5 3-875 257 545 3-8685 257 52 29-890 27 546-8700 27 53 27-8205 257 547 9-875 257 54 25-8220 27 548 7-8730 27 55 23-8235 257 549 5-8745 257 56 2-8250 27 550 3-8760 27 57 9-8265 257 55-8775 257 58 7-8280 27 552 9-8790 27 59 5-8295 257 553 7-8805 257 520 3-830 27 554 5-8820 27 52-8325 257 555 3-8835 257 522 09-8340 27 556-8850 27 523 07-8355 257 557 9-8865 257 524 05-8370 27 558 7-8880 27 525 03-8385 257 559 5-8895 257 526 0-8400 27 560 3-890 27 527 G99-845 257 56-8925 257 528 G97-8430 27 562 9-8940 27 Version.5 Page 32 of 89 206/06

PAD No. PIN Name X Y PAD No. PIN Name X Y 563 7-8955 257 597 9-9465 257 564 5-8970 27 598 7-9480 27 565 3-8985 257 599 5-9495 257 566-9000 27 600 3-950 27 567 G9-905 257 60-9525 257 568-9030 27 602 9-9540 27 569-9045 257 603 7-9555 257 570-9060 27 604 5-9570 27 57 G -9075 257 605 3-9585 257 572 9-9090 27 606-9600 27 573 7-905 257 607 9-965 257 574 5-920 27 608 7-9630 27 575 3-935 257 609 5-9645 257 576-950 27 60 3-9660 27 577 G99-965 257 6-9675 257 578 G97-980 27 62 9-9690 27 579 G95-995 257 63 7-9705 257 580 G93-920 27 64 5-9720 27 58 G9-9225 257 65 3-9735 257 582 G89-9240 27 66-9750 27 583 G87-9255 257 67 G9-9765 257 584 G85-9270 27 68-9780 27 585 G83-9285 257 69-9795 257 586 G8-9300 27 620-980 27 587 9-935 257 62 G -9825 257 588 7-9330 27 622 G9-9840 27 589 5-9345 257 623-9855 257 590 3-9360 27 624-9870 27 59-9375 257 625-9885 257 592 9-9390 27 626 G -9900 27 593 7-9405 257 627-9930 257 594 5-9420 27 628-9945 27 595 3-9435 257 596-9450 27 Version.5 Page 33 of 89 206/06

5. BLOCK DIAGRAM ST7282 I P G PARA_SERI SYNC DB[7:0] DG[7:0] DR[7:0] Version.5 Page 34 of 89 206/06

6. PIN SCRIPTION ST7282 6. Pin Function Name Type Description I Serial communication chip select, Internal pull high (I) I/O Serial communication data input and output,internal pull low (I) I Serial communication clock input, Internal pull low (I) PARA_SERI= Low, Serial 8-bit RGB input through D~D. I PARA_SERI PARA_SERI= High, Parallel 24-bit RGB input through DR0~7, DB0~DB7, (I) D~D I 8-bit digital Red data input DR0~DR7 (I) I 8-bit digital Green data input D~D (I) I 8-bit digital Blue data input DB0~DB7 (I) I Clock signal; latching data at the falling edge (I) I Horizontal sync signal; negative polarity (I) When not used, user should connect it to Low. I Vertical sync signal; negative polarity (I) When not used, user should connect it to Low. I Data input enable. Active High to enable the data input (I) When not used, user should connect it to Low. I No Function. User should connect it to Low SYNC (I) Horizontal scan direction control.. HDIR = High : Shift from left to right. I HDIR HDIR = Low : Shift from right to left. (I) When not used, user should connect it to High (Please refer to the register setting : HDIR) Vertical scan direction control. I VDIR = High : Shift from up to down. VDIR (I) VDIR = Low : Shift from down to up. When not used, user should connect it to High Version.5 Page 35 of 89 206/06

Name Type Description ST7282 VDPOL HDPOL POL SBGR I (I) I (I) I (I) I (I) polarity control. VDPOL= High, negative polarity VDPOL=Low, positive polarity When not used, user should connect it to High (Please refer to the register setting : VDPOL) polarity control. HDPOL= High, negative polarity HDPOL= Low, positive polarity When not used, user should connect it to High (Please refer to the register setting : VDPOL) polarity control. POL= High, negative polarity POL= Low, positive polarity (Please refer to the register setting : POL) Data R[7:0] & B[7:0] exchanged internally SBGR= R[7:0] B[7:0] B[7:0] R[7:0] SBGR= 0 R[7:0] R[7:0] B[7:0] B[7:0] I Global reset. Active low, Internal pull high (I) Display control / standby mode selection. Internal pull low I = Low : Standby. (I) = High : Normal display Control OTP trim function. Internal pull low. The pin should be floating for enabling the function of auto-refresh register. I = High : Enable OTP trim function and disable register refresh (I) automatically. = Low : Disable OTP trim function and enable register refresh automatically. Source / Gate Driver S~S720 O Source driver output signals G~44 O Gate driver output signals Version.5 Page 36 of 89 206/06

Generator O A power supply for the TFT-LCD common electrode. Frame polarity output for. Power Supply P Power supply for digital circuit I P Power supply for digital interface I/O pins P P Power supply for charge pump circuit P Ground pin for digital circuit A P Ground pin for analog circuit P P Ground pin for charge pump circuit P Power input pin for NVM. When writing NVM, it needs external power supply voltage (7.5V). If not used, let this pin open. A C A power supply pin for generating G. Connect a capacitor for stabilization. (Default NC) A PO A power supply pin for generating positive Gamma reference voltage. C A power supply pin for generating. Connect a capacitor for stabilization. (Default NC) C A power supply pin for generating negative Gamma reference voltage. Connect a capacitor for stabilization. (Default NC) PO Monitoring pin of internal digital power C Positive power supply for gate driver output. Connect a capacitor for stabilization. (Default NC) C Negative power supply for gate driver output. Connect a capacitor for stabilization. (Default NC) G PO A reference positive voltage of grayscale voltage generator. PO A reference negative voltage of grayscale voltage generator. Others T Internal offset monitor pin for feed-through voltage. TESTOUT[0:7] Test pins for internal testing only. User should leave it open. TESTOUT T TESTOUT3 TESTOUT4 TESTOUT5 TEST_IN[0:4] T Test pins for internal testing only. Internal pull low. User should leave it open or connect it to Low. Version.5 Page 37 of 89 206/06

Test pins for internal testing only. Internal pull high. User should leave it open or TEST_IN5 T connect it to High D Dummy pin. User should leave it open. Note.. I: input, O: output, I/O: input/output, P: power input, PO: power out, D: dummy, T: test pin, C: capacitor pin If unused pin don t floating, the pin fix to I or. Version.5 Page 38 of 89 206/06

7. 3-WIRE SERIAL INTERFACE a. Each serial command consists of 6 bits of data which is loaded one bit a time at the rising edge of serial clock. b. Command loading operation starts from the falling edge of and is completed at the next rising edge of. c. The serial control block is operational after power on reset, but commands are established by the signal. If command is transferred multiple times for the same register, the last command before the signal is valid. d. If less than 6 bits of are input while is low, the transferred data is ignored. e. If 6 bits or more of are input while is low, the previous 6 bits of transferred data before the rising edge of pulse are valid data. f. Serial block operates with the clock g. Serial data can be accepted in the power save mode. h. After power on reset or reset, it is required 00ms delay to begin SPI communication. Version.5 Page 39 of 89 206/06

8. REGISTER LIST ST7282 8. Register Summary No. TYP B7 B6 B5 B4 B3 B2 B B0 Default R0 R/W - VDIR HDIR - - - - - 60h R R/W - - - - - - 08h R2 R/W CONTRAST 40h R3 R/W - SUB_CONTRAST_R 40h R4 R/W - SUB_CONTRAST_B 40h R5 R/W BRIGHTNESS 40h R6 R/W - SUB_BRIGHTNESS_R 40h R7 R/W - SUB_BRIGHTNESS_B 40h R8 R/W H_BLANKING 2Bh R9 R/W VDPOL HDPOL V_BLANKING CCh R0 R/W - POL - - - - - - 40h COMMAND TABLE2 No. TYP B7 B6 B5 B4 B3 B2 B B0 Default R20 W PKP7[4] PKP6[4] PKP5[4] PKP4[4] PKP3[4] PKP2[4] PKP[4] PKP0[4] 3Eh R2 W - - - - VOS0P[4] VRF0P[4] PKP9[4] PKP8[4] 03h R22 W PKP[3:0] PKP0[3:0] ECh R23 W PKP3[3:0] PKP2[3:0] 97h R24 W PKP5[3:0] PKP4[3:0] 45h R25 W PKP7[3:0] PKP6[3:0] 87h R26 W PKP9[3:0] PKP8[3:0] 50h R27 W VOS0P[3:0] VRF0P[3:0] DAh R28 W PKN7[4] PKN6[4] PKN5[4] PKN4[4] PKN3[4] PKN2[4] PKN[4] PKN0[4] FEh R29 W - - - - VOS0N[4] VRF0N[4] PKN9[4] PKN8[4] 03h R2A W PKN[3:0] PKN0[3:0] 78h R2B W PKN3[3:0] PKN2[3:0] 30h R2C W PKN5[3:0] PKN4[3:0] 43h R2D W PKN7[3:0] PKN6[3:0] 30h R2E W PKN9[3:0] PKN8[3:0] A5h R2F W VOS0N[3:0] VRF0N[3:0] DAh R40 R/W VMF_SET VMF[6:0] C0h R4A W 0 0 0 0 0 0 OTP_EN 0 00h R4B W OTP_DUMP OTP_ADDR[6:0] 00h R4C W OTP_DATA[7:0] 00h R4D W OTP_CONTROL[7:0] 00h Version.5 Page 40 of 89 206/06

R50 R/W VRHP[6:0] D0h R5 R/W 0 VRHN[6:0] 5h R52 R/W [6:0] C2h R54 W 0 0 NO[:0] SEL[:0] SEL[:0] Fh R5B W T4[:] T3[:0] T2[:0] T[:0] R5D W REV R5E W GATE_WIDTH[2:0] 0 0 0 0 Note: When is low, all registers reset to default values. All commands will be executed at next. Version.5 Page 4 of 89 206/06

8.2 Command Table Register description ST7282 8.2. R0: Direction setting Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R0 R/W - VDIR HDIR - - - - - 60h Designation Address Description VDIR R0[6] Vertical shift direction setting VDIR=0: Shift from bottom to top, last line=l L2 L543 L544=first line VDIR=: Shift from top to bottom, first line=l L2 L543 L544=last line (default) * Hardware pin setting (VDIR) with R0[6] interaction HW PIN SW-R0[6] Vertical shift direction 0 0 Shift from up to down 0 Shift from down to up 0 Shift from down to up Shift from up to down HDIR R0[5] Horizontal shift direction setting HDIR=0: Shift from right to left, last data=y Y2 Y79 Y720=first data HDIR=: Shift from left to right, first data=y Y2 Y79 Y720=last data (default) * Hardware pin setting (HDIR) with R0[5] interaction HW PIN SW-R0[5] Horizontal shift direction 0 0 Shift from left to right 0 Shift from right to left 0 Shift from right to left Shift from left to right 8.2.2 R: Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R R/W - - - - - - 08h Designation Address Description R[3] Register reset setting =0: Reset all registers to default value =: Normal operation(default) R[0] Standby(power saving) mode setting Version.5 Page 42 of 89 206/06

=0: Standby, timing control, DAC, and DC/DC converter are off, and register data should be kept (default) =: Normal operation with power on/off sequence Version.5 Page 43 of 89 206/06

8.2.3 R2: CONSTRAST ST7282 Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R2 R/W CONTRAST 40h Designation Address Description CONTRAST R2[7:0] RGB contrast level setting, the gain changes (/64)/ bit CONTRAST=00h: contrast gain=0 CONTRAST=40h: contrast gain= (default) CONTRAST=FFh: contrast gain=3.984 8.2.4 R3: SUB-CONTRAST_R Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R3 R/W - SUB_CONTRAST_R 40h Designation Address Description SUB_CONT RAST_R R3[6:0] R sub-contrast level setting, the gain changes (/256) / bit Sub_CONTRAST_R=00h: contrast gain=0.75 Sub_CONTRAST_R=40h: contrast gain= (default) Sub_CONTRAST_R=7Fh: contrast gain=.246 8.2.5 R4: SUB-CONTRAST_B Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R4 R/W - SUB_CONTRAST_B 40h Designation Address Description SUB_CONT RAST_B R4[6:0] B sub-contrast level setting, the gain changes (/256) / bit Sub_CONTRAST_B=00h: contrast gain=0.75 Sub_CONTRAST_B=40h: contrast gain= (default) Sub_CONTRAST_B=7Fh: contrast gain=.246 Version.5 Page 44 of 89 206/06

8.2.6 R5: BRIGHTNESS ST7282 Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R5 R/W BRIGHTNESS 40h Designation Address Description BRIGHTNE SS R5[7:0] RGB brightness level setting, the accuracy step/ bit. BRIGHTNESS =00h: -64 BRIGHTNESS =40h: 0 (default) BRIGHTNESS =FFh: +9 8.2.7 R6: SUB-BRIGHTNESS_R Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R6 R/W - SUB_BRIGHTNESS_R 40h Designation Address Description SUB_BRIG HTNESS_R R6[6:0] R sub-brightness level setting, the accuracy step / bit. SUB_BRIGHTNESS_R=00h: -64 SUB_BRIGHTNESS_R=40h: 0 (default) SUB_BRIGHTNESS_R=7Fh: +63 8.2.8 R7: SUB-BRIGHTNESS_B Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R7 R/W - SUB_BRIGHTNESS_B 40h Designation Address Description SUB_BRIG HTNESS_B R7[6:0] B sub-brightness level setting, the accuracy step / bit. SUB_BRIGHTNESS_B=00h: -64 SUB_BRIGHTNESS_B=40h: 0 (default) SUB_BRIGHTNESS_B=7Fh: +63 8.2.9 R8: H_BLANKING Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R8 R/W H_BLANKING 2Bh Designation Address Description H_BLANKING R8[7:0] H back porch setting (unit: ) Version.5 Page 45 of 89 206/06

H_BLANKING=00h: 0 H_BLANKING=2Bh: 43(default) H_BLANKING=FFh: 255 ST7282 8.2.0 R9: VDPOL HDPOL V_BLANKING Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R9 R/W VDPOL HDPOL V_BLANKING CCh Designation Address Description VDPOL R9[7] polarity select VDPOL=0: Positive polarity VDPOL=: Negative polarity (default) * Hardware pin setting (VDPOL) with R9[7] interaction HW PIN SW-R9[7] VDPOL Polarity 0 0 Negative 0 Positive 0 Positive Negative HDPOL R9[6] polarity select HDPOL=0: Positive polarity HDPOL=: Negative polarity (default) * Hardware pin setting (HDPOL) with R9[6] interaction HW PIN SW-R9[6] HDPOL Polarity 0 0 Negative 0 Positive 0 Positive Negative V_BLANKIN G R9[5:0] V back porch setting (unit: H) V_BLANKING=00h: 0 V_BLANKING=0Ch: 2(default) V_BLANKING=3Fh: 63 Version.5 Page 46 of 89 206/06

8.2. R0: POL ST7282 Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R0 R/W - POL - - - - - - 40h Designation Address Description POL R0[6] Polarity Select POL=0: Positive Polarity POL=: Negative Polarity(default) * Hardware pin setting (POL) with R0[6] interaction HW PIN SW-R0[6] POL Polarity 0 0 Negative 0 Positive 0 Positive Negative Version.5 Page 47 of 89 206/06

8.3 Command Table 2 Register description 8.3. R7F: COMMAND2_ENABLE ST7282 Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R7F R/W - - - - - - - CMD2_EN 00h Designation Address Description CMD2_EN R7F[0] Command table and Command 2 table switch CMD2_EN = 0: Command table enable (default) CMD2_EN = : Command 2 table enable 8.3.2 R20~R2F: GAMMA SELECTION Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R20 W PKP7[4] PKP6[4] PKP5[4] PKP4[4] PKP3[4] PKP2[4] PKP[4] PKP0[4] 3Eh R2 W - - - - VOS0P[4] VRF0P[4] PKP9[4] PKP8[4] 03h R22 W PKP[3:0] PKP0[3:0] ECh R23 W PKP3[3:0] PKP2[3:0] 97h R24 W PKP5[3:0] PKP4[3:0] 45h R25 W PKP7[3:0] PKP6[3:0] 87h R26 W PKP9[3:0] PKP8[3:0] 50h R27 W VOS0P[3:0] VRF0P[3:0] DAh R28 W PKN7[4] PKN6[4] PKN5[4] PKN4[4] PKN3[4] PKN2[4] PKN[4] PKN0[4] FEh R29 W - - - - VOS0N[4] VRF0N[4] PKN9[4] PKN8[4] 03h R2A W PKN[3:0] PKN0[3:0] 78h R2B W PKN3[3:0] PKN2[3:0] 30h R2C W PKN5[3:0] PKN4[3:0] 43h R2D W PKN7[3:0] PKN6[3:0] 30h R2E W PKN9[3:0] PKN8[3:0] A5h R2F W VOS0N[3:0] VRF0N[3:0] DAh Designation Address Description VRF0P[4:0] R2[2], R27[3:0] V8 Gamma selection VRF0N[4:0] R29[2], R2F[3:0] PKP0[4:0] R20[0], R22[3:0] V6 Gamma selection PKN0[4:0] R28[0], R2A[3:0] PKP[4:0] R20[], R22[7:4] V32 Gamma selection PKN[4:0] R28[], R2A[7:4] PKP2[4:0] R20[2], R23[3:0] V48 Gamma selection Version.5 Page 48 of 89 206/06

PKN2[4:0] R28[2], R2B[3:0] PKP3[4:0] R20[3], R23[7:4] V80 Gamma selection PKN3[4:0] R28[3], R2B[7:4] PKP4[4:0] R20[4], R24[3:0] V2 Gamma selection PKPN4[4:0] R28[4], R2C[3:0] PKP5[4:0] R20[5], R24[7:4] V44 Gamma selection PKN5[4:0] R28[5], R2C[7:4] PKP6[4:0] R20[6], R25[3:0] V76 Gamma selection PKN6[4:0] R28[6], R2D[3:0] PKP7[4:0] R20[7], R25[7:4] V208 Gamma selection PKN7[4:0] R28[6], R2D[7:4] PKP8[4:0] R2[0], R26[3:0] V224 Gamma selection PKN8[4:0] R29[0], R2E[3:0] PKP9[4:0] R2[], R26[7:4] V240 Gamma selection PKN9[4:0] R29[], R2E[7:4] VOS0P[4:0] R2[3], R27[7:4] V248 Gamma selection VOS0N[4:0] R29[3], R2F[7:4] ST7282 Version.5 Page 49 of 89 206/06

8.3.3 R50: G SETTING ST7282 Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R50 R/W VRHP[5:0] D0h Designation Address Description VRHP[5:0] R50[5:0] G level adjustment VRHP[5:0] G VRHP[5:0] G VRHP[5:0] G VRHP[5:0] G 000000 5.9680 00000 5.720 00000 5.4560 0000 5.2000 00000 5.9520 0000 5.6960 0000 5.4400 000 5.840 00000 5.9360 0000 5.6800 0000 5.4240 000 5.680 0000 5.9200 000 5.6640 000 5.4080 00 5.520 00000 5.9040 0000 5.6480 0000 5.3920 000 5.360 0000 5.8880 000 5.6320 000 5.3760 00 5.200 0000 5.8720 000 5.660 000 5.3600 00 5.040 000 5.8560 00 5.6000 00 5.3440 0 5.0880 00000 5.8400 0000 5.5840 0000 5.3280 000 5.0720 0000 5.8240 000 5.5680 000 5.320 00 5.0560 0000 5.8080 000 5.5520 000 5.2960 00 5.0400 000 5.7920 00 5.5360 00 5.2800 0 5.0240 0000 5.7760 000 5.5200 000 5.2640 00 5.0080 000 5.7600 00 5.5040 00 5.2480 0 4.9920 000 5.7440 00 5.4880 00 5.2320 0 4.9760 00 5.7280 0 5.4720 0 5.260 4.9600 8.3.4 R5: SETTING Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R5 R/W 0 VRHN[6:0] 5h Designation Address Description VRHN[6:0] R5[6:0] level adjustment VRHN[6:0] VRHN[6:0] VRHN[6:0] VRHN[6:0] 000000-4.4800 0000-4.0960 00000-3.720 0000-3.3280 00000-4.4640 000-4.0800 0000-3.6960 000-3.320 00000-4.448 000-4.0640 0000-3.6800 000-3.2960 0000-4.4320 00-4.0480 000-3.6640 00-3.2800 00000-4.460 000-4.0320 0000-3.6480 000-3.2640 Version.5 Page 50 of 89 206/06

0000-4.4000 00-4.060 000-3.6320 00-3.2480 0000-4.3840 00-4.0000 000-3.660 00-3.2320 000-4.3680 0-3.9840 00-3.6000 0-3.260 00000-4.3520 000000-3.9680 0000-3.5840 0000-3.2000 0000-4.3360 00000-3.9520 000-3.5680 000-3.840 0000-4.3200 00000-3.9360 000-3.5520 000-3.680 000-4.3040 0000-3.9200 00-3.5360 00-3.520 0000-4.2880 00000-3.9040 000-3.5200 000-3.360 000-4.2720 0000-3.8880 00-3.5040 00-3.200 000-4.2560 0000-3.8720 00-3.4880 00-3.040 00-4.2400 000-3.8560 0-3.4720 0-3.0880 00000-4.2240 00000-3.8400 00000-3.4560 000-3.0720 0000-4.2080 0000-3.8240 0000-3.4400 00-3.0560 0000-4.920 0000-3.8080 0000-3.4240 00-3.0400 000-4.760 000-3.7920 000-3.4080 0-3.0240 0000-4.600 0000-3.7760 0000-3.3920 00-3.0080 000-4.440 000-3.7600 000-3.3760 0-2.9920 000-4.280 000-3.7440 000-3.3600 0-2.9760 00-4.20 00-3.7280 00-3.3440-2.9600 8.3.5 R52: SETTING Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R52 R/W [6:0] C2h Designation Address Description [6:0] R52[6:0] level adjustment [6:0] [6:0] [6:0] [6:0] 000000.5520 0000.680 00000 0.7840 0000 0.4000 00000.5360 000.520 0000 0.7680 000 0.3840 00000.5200 000.360 0000 0.7520 000 0.3680 0000.5040 00.200 000 0.7360 00 0.3520 00000.4880 000.040 0000 0.7200 000 0.3360 0000.4720 00.0880 000 0.7040 00 0.3200 0000.4560 00.0720 000 0.6880 00 0.3040 000.4400 0.0560 00 0.6720 0 0.2880 00000.4240 000000.0400 0000 0.6560 0000 0.2720 0000.4080 00000.0240 000 0.6400 000 0.2560 Version.5 Page 5 of 89 206/06

0000.3920 00000.0080 000 0.6240 000 0.2400 000.3760 0000 0.9920 00 0.6080 00 0.2240 0000.3600 00000 0.9760 000 0.5920 000 0.2080 000.3440 0000 0.9600 00 0.5760 00 0.920 000.3280 0000 0.9440 00 0.5600 00 0.760 00.320 000 0.9280 0 0.5440 0 0.600 00000.2960 00000 0.920 00000 0.5280 000 0.440 0000.2800 0000 0.8960 0000 0.520 00 0.280 0000.2640 0000 0.8800 0000 0.4960 00 0.20 000.2480 000 0.8640 000 0.4800 0 0.0960 0000.2320 0000 0.8480 0000 0.4640 00 0.0800 000.260 000 0.8320 000 0.4480 0 0.0640 000.2000 000 0.860 000 0.4320 0 0.0480 00.840 00 0.8000 00 0.460 0.0320 8.3.6 R54:, SETTING Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[] Bit[0] Default R54 R/W 0 0 NO[:0] SEL[:0] VGSEL[:0] Fh Designation Address Description NO[:0] R54[5:4] Gate non-overlap adjustment SEL[:0] R54[3:2] SEL[:0] R54[:0] NO[:0] Non-overlap () 00 20 0 30 0 40 50 level adjustment SEL[:0] (V) 00-7 0-8 0 -.5-0 level adjustment SEL[:0] (V) 00 3 0 5 Version.5 Page 52 of 89 206/06

2024 © autodocbox.com Privacy Policy | Terms of Service | Feedback