NC7SV08 TinyLogic ULP-A 2-Input AND Gate

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NC7S08 TinyLogic ULP-A 2-Input AND Gate Features 0.9 to 3.6 CC Supply Operation 3.6 Over-oltage Tolerant I/Os at CC from 0.9 to 3.6 Extremely High Speed t PD - 1.0 ns: Typical for 2.7 to 3.6 CC - 1.2 ns: Typical for 2.3 to 2.7 CC - 2.0 ns: Typical for 1.65 to 1.95 CC - 3.2 ns: Typical for 1.4 to 1.6 CC - 6.0 ns: Typical for 1.1 to 1.3 CC - 13.0 ns: Typical for 0.9 CC Power-Off High-Impedance Inputs and Outputs High Static Drive (I OH /I OL ) Description November 2012 The NC7S08 is a single two-input AND gate from Fairchild's Ultra-Low Power (ULP-A) Series of TinyLogic. ULP-A is ideal for applications that require extreme high speed, high drive, and low power. This product is designed for a wide low-voltage operating range (0.9 to 3.6 CC ) and applications that require more drive and speed than the TinyLogic ULP series, but still offer best-in-class, low-power operation. The NC7S08 is uniquely designed for optimized power and speed and is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. - ±24 ma at 3.00 CC - ±18 ma at 2.30 CC - ±6 ma at 1.65 CC - ±4 ma at 1.4 CC - ±2 ma at 1.1 CC - ±0.1 ma at 0.9 CC Uses Proprietary Quiet Series Noise/EMI Reduction Circuitry Ultra-Small MicroPak Packages Ultra-Low Dynamic Power Ordering Information Part Number Top Mark Package Packing Method NC7S08P5X 08 5-Lead SC70, EIAJ SC-88a, 1.25 mm Wide 3000 Units on Tape & Reel NC7S08L6X G3 6-Lead MicroPak, 1.00 mm Wide 5000 Units on Tape & Reel NC7S08FHX G3 6-Lead, MicroPak2, 1x1 mm Body,.35 mm Pitch 5000 Units on Tape & Reel TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak and Quiet Series are trademarks of Fairchild Semiconductor Corporation. NC7S08 Rev. 1.0.5

Battery Life Figure 1. Battery Life vs. CC Supply oltage Notes: 1. TinyLogic ULP and ULP-A with up to 50% less power consumption can extend battery life significantly. Battery Life = ( battery I battery.9)/(p device )/24hrs/day where, P device = (I CC CC ) + (C PD + C L ) CC2 f. 2. Assumes ideal 3.6 Lithium Ion battery with current rating of 90 0mAH and derated 90% and device frequency at 10MHz, with C L = 15 pf load. Connection Diagram A B IEEE/IEC & Y Figure 2. Logic Symbol NC7S08 Rev. 1.0.5 2

Pin Configurations A GND B 2 1 5 CC 3 4 B Y GND Figure 3. SC70 (Top iew) Figure 4. MicroPak (Top Through iew) Pin Definitions Pin # SC70 Pin # MicroPak Name Description 1 1 A Input 2 2 B Input 3 3 GND Ground 4 4 Y Output 5 NC No Connect 5 6 CC Supply oltage A 1 2 3 6 5 4 CC NC Y Function Table Inputs Output A B Y L L L L H L H L L H H H H = HIGH Logic Level L = LOW Logic Level NC7S08 Rev. 1.0.5 3

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit CC Supply oltage -0.5 4.6 IN DC Input oltage -0.5 4.6 OUT DC Output oltage HIGH or LOW State (3) -0.5 CC + 0.5 CC = 0-0.5 4.6 I IK DC Input Diode Current IN < 0-50 ma I OK DC Output Diode Current OUT < 0-50 OUT > CC +50 I OH/ I OL DC Output Source/Sink Current ±50 ma I CC or I GND DC CC or Ground Current per Supply Pin ±50 ma T STG Storage Temperature Range -65 +150 C T J Junction Temperature Under Bias +150 C T L Junction Lead Temperature, Soldering 10 Seconds +260 C P D ESD Power Dissipation at +85 C SC70-5 150 MicroPak-6 130 MicroPak2-6 120 Human Body Model, JEDEC:JESD22-A114 4000 Charge Device Model, JEDEC:JESD22-C101 2000 Note: 3. IO absolute maximum rating must be observed. ma mw Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Conditions Min. Max. Unit CC Supply oltage 0.9 3.6 IN Input oltage 0 3.6 OUT I OH /I OL Output oltage Output Current in I OH /I OL CC = 0 0 3.6 HIGH or LOW State 0 CC CC = 3.0 to 3.6 ±24 CC = 2.3 to 3.6 ±18 CC = 1.65 to 1.95 ±6 CC = 1.4 to 1.6 ±4 CC = 1.1 to 1.3 ±2 CC = 0.9 ±0.1 T A Operating Temperature, Free Air -40 +85 C Δt/Δ Minimum Input Edge Rate IN = 0.8 to 2.0, CC = 3.0 10 ns/ SC70-5 425 θ JA Thermal Resistance MicroPak-6 500 MicroPak2-6 560 Note: 4. Unused inputs must be held HIGH or LOW. They may not float. NC7S08 Rev. 1.0.5 4 ma C/W

DC Electrical Characteristics Symbol Parameter CC Conditions IH IL HIGH Level Input oltage LOW Level Input oltage T A =25 C T A =-40 to 85 C Min. Max. Min. Max. 0.90.65 x CC.65 x CC 1.10 CC 1.30.65 x CC.65 x CC 1.40 CC 1.60.65 x CC.65 x CC 1.65 CC 1.95.65 x CC.65 x CC 2.30 CC 2.70 1.6 1.6 2.70 CC 3.60 2.0 2.0 0.90.35 x CC.35 x CC 1.10 CC 1.30.35 x CC.35 x CC 1.40 CC 1.60.35 x CC.35 x CC 1.65 CC 1.95.35 x CC.35 x CC 2.30 CC 2.70 0.7 0.7 2.70 CC 3.60 0.8 0.8 0.90 CC -0.1 CC -0.1 1.10 CC 1.30 CC -0.1 CC -0.1 1.40 CC 1.60 CC -0.2 CC -0.2 1.65 CC 1.95 I OH =-100 µa CC -0.2 CC -0.2 2.30 CC 2.70 CC -0.2 CC -0.2 2.70 CC 3.60 CC -0.2 CC -0.2 Units OH HIGH Level Output oltage 1.10 CC 1.30 I OH =-2 ma.75 x CC.75 x CC 1.40 CC 1.60 I OH =-4 ma.75 x CC.75 x CC 1.65 CC 1.95 IOH =-6 ma 1.25 1.25 2.30 CC 2.70 2.00 2.00 2.30 CC 2.70 IOH =-12 ma 1.8 1.8 2.70 CC 3.60 2.2 2.2 2.30 CC 2.70 IOH =-18 ma 1.7 1.7 2.70 CC 3.60 2.4 2.4 2.70 CC 3.60 I OH =-24 ma 2.2 2.2 Continued on following page NC7S08 Rev. 1.0.5 5

DC Electrical Characteristics (Continued) Symbol Parameter CC Conditions OL I IN I OFF I CC LOW Level Output oltage Input Leakage Current Power Off Leakage Current Quiescent Supply Current 0.90 T A =25 C T A =-40 to 85 C Min. Max. Min. Max. 0.1 0.1 1.10 CC 1.30 0.1 0.1 1.40 CC 1.60 0.2 0.2 I OL =100 µa 1.65 CC 1.95 0.2 0.2 2.30 CC 2.70 0.2 0.2 2.70 CC 3.60 0.2 0.2 1.10 CC 1.30 I OL =2 ma 0.25 x CC 0.25 x CC 1.40 CC 1.60 I OL =4 ma 0.25 x CC 0.25 x CC 1.65 CC 1.95 I OL =6 ma 0.3 0.3 2.30 CC 2.70 0.4 0.4 IOL =12 ma 2.70 CC 3.60 0.4 0.4 2.30 CC 2.70 0.6 0.6 IOL =18 ma 2.70 CC 3.60 0.4 0.4 2.70 CC 3.60 I OL =24 ma 0.55 0.55 0.90 to 3.60 0 IN 3.60 ±0.1 ±0.5 µa Units 0 0 ( IN, v O ) 3.60 0.5 0.5 µa 0.90 to 3.60 IN = CC, or GND 0.9 0.9 CC IN 3.6 ±0.9 µa AC Electrical Characteristics Symbol Parameter CC Conditions t PHL, t PLH C IN C PD Propagation Delay Input Capacitance Power Dissipation Capacitance 0.90 C L =15 pf, R L =1 MΩ 13 T A =25 C T A =-40 to 85 C Min. Typ. Max. Min. Max. 1.10 CC 1.30 3.0 6.0 10.0 1.0 14.6 C L =15 pf, R L =2k Ω 1.40 CC 1.60 1.0 3.2 6.0 1.0 7.2 1.65 CC 1.95 1.0 2.0 4.5 1.0 5.3 2.30 CC 2.70 C L =30 pf, R L =500 Ω 0.8 1.2 2.6 0.7 3.7 2.70 CC 3.60 0.7 1.0 2.3 0.6 3.0 Units 0 2 pf 0.90 to 3.60 IN =0 or CC, f=10 MHz ns 8 pf Figure Figure 5 Figure 6 NC7S08 Rev. 1.0.5 6

AC Loadings and Waveforms Figure 5. AC Test Circuit Figure 6. AC Waveforms Symbol CC 3.3 ±0.3 2.5 ±0.2 1.8 ±0.15 1.5 ±0.1 1.2 ±0.1 0.9 mi 1.5 CC /2 CC /2 CC /2 CC /2 CC /2 mo 1.5 CC /2 CC /2 CC /2 CC /2 CC /2 NC7S08 Rev. 1.0.5 7

Physical Dimensions Figure 7. 5-Lead, SC70, EIAJ SC-88a, 1.25 mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-5_tr.pdf. Package Designator Tape Section Cavity Number Cavity Status Cover Type Status P5X Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed NC7S08 Rev. 1.0.5 8

Physical Dimensions 2X 1.45 (0.254) TOP IEW PIN 1 IDENTIFIER 5 0.55MAX C DETAIL A 1.0 B 2X 1.00 0.05 0.00 0.25 0.15 6X A (0.49) 5X (0.52) 1X PIN 1 0.10 C B A (1) (0.30) 6X RECOMMENED LAND PATTERN 0.10 0.00 6X 0.40 0.30 (0.75) 0.45 0.35 0.35 0.25 5X (0.05) 6X 0.5 BOTTOM IEW 0.40 0.30 0.075 X 45 CHAMFER Notes: 1. CONFORMS TO JEDEC STANDARD M0-252 ARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 4. FILENAME AND REISION: MAC06ARE4 5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY OTHER LINE IN THE MARK CODE LAYOUT. Figure 8. 6-Lead, MicroPak, 1.0 mm Wide 5X (0.13) 4X DETAIL A PIN 1 TERMINAL Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator Tape Section Cavity Number Cavity Status Cover Type Status L6X Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed NC7S08 Rev. 1.0.5 9

Physical Dimensions 2X 1.00 PIN 1 MIN 250uM TOP IEW C SIDE IEW (0.08) 4X DETAIL A 1 2 3 B 0.55MAX A 1.00 0.09 0.19 2X 6X 5X 0.40 1X 0.45 5X 0.52 0.89 0.35 6X 0.19 0.66 RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB 0.90 0.35 1X 0.57 0.73 0.20 6X ALTERNATIE LAND PATTERN FOR UNIERSAL APPLICATION (0.05) 6X 5X 0.35 0.25 0.35 6 5 4 0.60 (0.08) 4X BOTTOM IEW NOTES: A. COMPLIES TO JEDEC MO-252 STANDARD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN. E. DRAWING FILENAME AND REISION: MGF06ARE3 Figure 9. 0.10 C B A.05 C 0.075X45 CHAMFER 0.40 0.30 DETAIL A PIN 1 LEAD SCALE: 2X 6-Lead, MicroPak2, 1x1mm Body,.35 mm Pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/micropak2_6l_tr.pdf Package Designator Tape Section Cavity Number Cavity Status Cover Type Status FHX Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed NC7S08 Rev. 1.0.5 10

NC7S08 Rev. 1.0.5 11