DESCRIPTIO FEATURES APPLICATIO S LT3464 Micropower Boost Converter with Schottky and Output Disconnect in ThinSOT

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1 FEATRES Tiny Solution Size Low Quiescent Current µa in Active Mode.µA in Shutdown Mode Internal ma, 6V Switch Integrated Schottky Diode Integrated PNP Output Disconnect with Short-Circuit Protection Internal Reference Override Pin 6V at ma from.6v Input V at ma from V Input Input Range:.V to V High Output Voltage: p to V Low Profile (mm) SOT- Package APPLICATIO S OEL Panel Bias LCD Bias Handheld Computers Battery Backup Digital Cameras Cellular Phones LT6 Micropower Boost Converter with Schottky and Output Disconnect in ThinSOT DESCRIPTIO The LT 6 is a micropower step-up DC/DC converter with integrated Schottky diode and output disconnect packaged in an -lead low profile (mm) SOT-. The small package size, high level of integration, and the use of tiny SMT components yield a solution size of less than mm. The LT6 has a typical current limit of ma as well as fast switching speed to allow the use of a chip inductor and small ceramic capacitors. The internal PNP disconnects the output load from the input during shutdown, and also provides output short-circuit protection. An auxiliary reference input allows the user to override the internal.v feedback reference with any lower value, allowing full control of the output voltage during operation. This device features a low µa quiescent current, which is further reduced to less than.µa in shutdown. A current limited fixed off-time control scheme conserves operating current, resulting in high efficiency over a broad range of operating current. The rugged 6V switch and output disconnect circuitry allow outputs up to V to be easily generated in a simple boost topology., LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technolgy Corporation TYPICAL APPLICATIO.V TO V µf µh LT6.µF 6V.µF.M 9k EFFICIENCY (%) =.V Efficiency =.V 6 TAa.. LOAD CRRENT (ma) 6 TAb 6f

2 LT6 ABSOLTE AXI RATI GS (Note ) W W W,, Voltage... V, Voltage... 6V Voltage... 6V Voltage... 6V Maximum Junction Temperature... C Operating Temperature Range (Note ).. C to C Storage Temperature Range... 6 C to C Lead Temperature (Soldering, sec)... C W PACKAGE/ORDER I FOR ATIO TOP VIEW TS PACKAGE -LEAD PLASTIC SOT- 7 6 T JMAX = C, θ JA = C/W, θ JC = C/W ORDER PART NMBER LT6ETS TS PART MARKING LTG Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. =.6V, unless otherwise noted. (Note ) PARAMETER CONDITIONS MIN TYP MAX NITS Minimum Input Voltage.. V Quiescent Current Not Switching 6 µa V =.V.. µa Comparator Trip Voltage V Falling, V =.6V...7 V Comparator Hysteresis mv Pin Bias Current V =.V, V =.6V na Voltage Line Regulation.V < < V.. %/V Switch Off Time V - = V ns V - = V. µs Switch Leakage Current V = 6V. µa Switch V CESAT I = ma 9 mv Switch Current Limit ma Schottky Forward Voltage I SCHOTTKY = ma 6 7 mv Schottky Reverse Leakage V - = 6V µa PNP Disconnect V - I = µa mv I = ma 9 mv PNP Disconnect Q Current I =, V = 6V (Note ). µa PNP Disconnect Leakage =., V = V, = V. µa PNP Disconnect Current Limit V = V, = V 7 ma Pin Current V =.6V µa Input Voltage High. V Input Voltage Low. V Pin Bias Current V =.V, V = V 6 na to Offset V =.V (Note ) 7 mv Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : The LT6E is guaranteed to meet performance specifications from C to 7 C. Specifications over the C to C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note : Current consumed by Disconnect PNP when there is no load on the pin. Note : This figure is computed according to ((V falling + V rising)/) V CONTROL. 6f

3 LT6 TYPICAL PERFOR A CE CHARACTERISTICS W Switch Saturation Voltage I = ma Switch Current Limit Switch Off-Time, V = V ITCH VOLTAGE (mv) 6 ITCH CRRENT (ma) 6 ITCH OFF-TIME (ns) 7 6 G 7 6 G 7 6 G ITCH ON-TIME (ns) Minimum Switch On-Time Switch Off-Time, V = V Output Disconnect Voltage Drop ITCH OFF-TIME (µs) VOLTAGE DROP (mv) I = ma I = µa 7 6 G 6 G 6 G6 QIESCENT CRRENT (µa) Output Disconnect Quiescent Current Output Disconnect Current Limit Output Disconnect Voltage Drop CRRENT LIMIT (ma) 6 7 VOLTAGE DROP (mv) COLLECTOR CRRENT (ma) 6 G7 6 G 6 G9 6f

4 LT6 TYPICAL PERFOR A CE CHARACTERISTICS W 7 Schottky Forward Drop at I D = ma Schottky Forward Voltage Schottky Reverse Leakage V = 6V VOLTAGE DROP (mv) SCHOTTKY CRRENT (ma) LEAKAGE CRRENT (µa) FORWARD VOLTAGE (mv) 7 6 G 6 G 6 G Quiescent Current Shutdown Pin Current V =.6V 6 Quiescent Current in Shutdown Mode QIESCENT CRRENT (µa) 6 6 SHTDOWN PIN CRRENT (µa) 6 QIESCENT CRRENT (na) G 6 G 6 G 7 Quiescent Current in Regulation with No Load. Pin Threshold Voltage. Pin Voltage QIESCENT CRRENT (µa) 6 = V FRONT PAGE SCHEMATIC 6 6 (V) PIN VOLTAGE (V) PIN VOLTAGE (V) G 6 G 6 G6 6f

5 LT6 TYPICAL PERFOR A CE CHARACTERISTICS W. Pin Voltage vs Pin Voltage and Pin Bias Currents Pin Hysteresis PIN VOLTAGE (V) BIAS CRRENT (na) 7 6 PIN FEEDBACK PIN HYSTERESIS (mv) CONTROL PIN VOLTAGE (V) 6 G7 7 6 G 7 6 G9 PI F CTIO S (Pin ): Internal Reference Override Pin. This allows the voltage to be externally set between V and.v. Tie this pin to above.v ( for example) to use the internal.v reference. V R = V + R when V is less than.v (see Figure ) (Pin ): Feedback Pin. The LT6 regulates its feedback pin to.v if the internal reference is used or to V if the pin is between V and.v. Connect the feedback resistor divider tap to this pin. Set the output voltage by selecting R and R (see Figure ). R R = V REF (Pin ): Ground. Tie this pin directly to the ground plane. (Pin ): PNP Emitter and Schottky Cathode. This pin connects to the output capacitor, and optionally to the external phase-lead capacitor. (Pin 6): Switch Pin and Schottky Anode. This is the collector of the internal NPN power switch. Minimize the metal trace area connected to the pin to minimize EMI. (Pin 7): Input Supply Pin: Bypass this pin with a capacitor located as close to the device as possible. (Pin ): Shutdown Pin. This pin is used to put the device in shutdown mode. Tie the pin low to shut down the LT6. Tie high for normal operation See the electrical specifications for the required voltages. (Pin ): PNP Collector. This is the output of the Output Disconnect circuit. Bypass this pin with at least a.µf capacitor connected to the pin or to ground. 6f

6 + LT6 BLOCK DIAGRA W C PL DELAY S Q + R Q ANTI SAT.V mv.ω V REF 6 BD OPERATIO The LT6 uses a constant off-time control scheme in conjunction with Burst Mode operation to provide high efficiency over a wide range of output current. Operation can best be understood by studying the Block Diagram. When the pin voltage is lower than the.v reference, the hysteretic comparator enables the power section, causing the chip to start switching, thus charging the output capacitor. When the output voltage increases enough to overcome the hysteresis, the feedback comparator shuts off the power section leaving only low power circuitry running until the output voltage falls again. This cycle repeats, keeping the output voltage within a small window. The switching action is as follows: The switch turns on, and current through it starts to ramp up until the point where the current limit is reached, at which point the switch turns off for a fixed amount of time. While the switch is off the inductor is delivering current to the load. When the off time expires, the switch turns on again until the current limit is reached, and the cycle repeats. This chip includes an internal power Schottky diode and a PNP transistor for output disconnect. The PNP transistor disconnects the load from the input during shutdown. The PNP control circuitry is designed to keep the PNP out of saturation across a wide range of current, to keep quiescent current to a minimum and to provide current limiting to protect the chip during short-circuit conditions. Burst Mode is a registered a trademark of Linear Technolgy Corporation. 6 6f

7 LT6 W W ITCHI G TI E WAVEFOR S Operating Waveforms Start up Waveforms I L.A/DIV I L.A/DIV mv/div V/DIV = V = V I LOAD = ma L = µh µs/div µs/div Shutdown Waveforms V/DIV = V ms/div PIN VOLTAGE : THE PT DISCONNECT ALLOWS TO BE AT GROND DRING SHTDOWN 6f 7

8 LT6 APPLICATIO S I FOR Choosing an Inductor ATIO W The low current limit and fast switching of the LT6 allow the use of very small surface mount inductors. The minimum inductor size that may be used in a given application depends on required efficiency and output current. Some inductors that work with the LT6 are listed in Table, although there are many other manufacturers and devices that can be used. Consult each manufacturer for more detailed information and for their entire selection of related parts. Many different sizes and shapes are available. Table. Recommended Inductors PART NMBER µh DCR CRRENT MANFACTRER (Ω) (ma) LQHCN6K 6. Murata LQHCN7K LQHCNK.7 ELJPCKF. 6 Panasonic ELJPA7KF CMDD-7 7. Sumida LB6-. Taiyo Yuden LEM LEM LEMC-. LEMC-. LEMF-. LEMC-6 6. LEMC-. The following set of formulas can be used to calculate maximum output current given, and L values. Inequality is used to determine if the LT6 is operating in discontinuous mode. If the left hand side of inequality evaluates to less than OFF t, then use Equation to calculate maximum output current. Otherwise, use Equation. This inequality is true when the LT6 is operating in discontinuous mode. LILIM < toff (INEQALITY ) ( V V + V ) IN F se this equation to calculate the maximum output current when the LT6 is operating in continuous mode. I( CM) = ( LILIM + toff( VIN V VF ))( VIN VCESAT) LV ( V + V ) CESAT F () se this equation to calculate the maximum output current when the LT6 is operating in discontinuous mode. I ( DCM) = LILIM ( VIN VCESAT) () ( LI + V t t V )( V + V + V ) LIM IN OFF OFF CESAT IN F Where V F is the Schottky forward voltage, I LIM is the switch current limit, t OFF is the switch off time, and V CESAT is the switch saturation voltage. See the Electrical Specifications. Figures through show the worst-case maximum output current as given by Equations and using % inductor derating and worst-case LT6 specifications. Also note that for some applications the maximum output current is limited to ma by the output disconnect circuitry. 7. I (ma) L = 7µH L = µh L = µh I (ma) L = 7µH L = µh L = µh I (ma) L = 7µH L = µh L = µh.. L =.7µH (V) 6 F Figure. Maximum Output Current =.6V L =.7µH (V) 6 F Figure. Maximum Output Current = V L =.7µH (V) 6 F Figure. Maximum Output Current =.V 6f

9 APPLICATIO S I FOR ATIO W Capacitor Selection The small size and low ESR of ceramic capacitors makes them suitable for LT6 applications. XR and X7R types are recommended because they retain their capacitance over wider voltage and temperature ranges than other types such as YV or Z. A µf input capacitor and a.µf to.7µf output capacitor are sufficient for most LT6 applications. Always use a capacitor with a sufficient voltage rating. Table shows a list of several capacitor manufacturers. Consult the manufacturers for more detailed information and for their entire selection of related parts. Table. Recommended Ceramic Capacitor Manufacturers MANFACTRER PHONE RL Taiyo Yuden AVX Murata Kemet Setting Output Voltage and the Auxiliary Reference Input The LT6 is equipped with both an internal.v reference and an auxiliary reference input. This allows the LT6 user to select between using the built-in reference, and supplying an external reference voltage. The voltage at the pin can be adjusted while the chip is operating to alter the output voltage of the LT6 for purposes such as display dimming or contrast adjustment. To use the internal.v reference, the pin must be held higher than.v, which can be done by tying it to. When the pin is held between V and.v the LT6 will regulate the output such that the pin voltage is equal to the pin voltage. To set the output voltage, select the values of R and R according to the following equation (see Figure ). R R = V REF Where V REF =.V if the internal reference is used, or V REF = V if V is between V and.v. Choosing a Feedback Node Output Voltage Ripple sing low ESR capacitors will help minimize the output ripple voltage, but proper selection of the inductor and the output capacitor also plays a big role. The LT6 provides energy to the load in bursts by ramping up the inductor current, then delivering that current to the load. If too large an inductor value or too small a capacitor value is used, the output ripple voltage will increase because the capacitor will be slightly overcharged each burst cycle. To reduce this effect, a larger output capacitor may be used. The LT6 also includes an on-chip phase-lead capacitor between the pin and the pin to greatly reduce ripple; however, certain applications can benefit from additional capacitance in parallel with the integrated capacitor, which may be added externally between the and pins. Typical effective values range from.7pf to pf. Since the pin sits at a low voltage, be sure the chosen capacitor has a sufficient voltage rating. The top of the feedback divider may be connected to the pin or to the pin (see Figure ). Regulating the pin eliminates the output offset resulting from the voltage drop across the output disconnect. However, in the case of a short-circuit fault at the pin, the LT6 will switch continuously because the pin is low. While operating in this open-loop condition, the rising voltage at the pin is limited only by the current limit of the output disconnect. Given worst-case parameters this voltage may reach V. When the short-circuit is removed, the pin will bounce up to the voltage on the pin, potentially exceeding the set output voltage until the capacitor voltages fall back into regulation. While this is harmless to the LT6, this should be considered in the context of the external circuitry if short-circuit events are expected. Regulating the pin ensures that the voltage on the pin never exceeds the set output voltage after a shortcircuit event. However, this setup does not compensate for the voltage drop across the output disconnect, resulting in an output voltage that is slightly lower than the voltage set by the resistor divider. The next section discusses how to compensate for this drop. 6f 9

10 LT6 APPLICATIO S I FOR ATIO W LT6 R R LT6 R R 6 F V - (SAT) COLLECTOR CRRENT (ma) 6 F Figure. Feedback Connection sing the Pin and the Pin Figure : Output Disconnect Voltage Drop (V DROP ) vs Current Output Disconnect Considerations The LT6 is equipped with an output disconnect that isolates the load from the input during shutdown. See the Inrush Current Operation section for a functional diagram. The output disconnect uses a pass PNP coupled with circuitry that varies the base current such that the transistor is consistently at the edge of saturation, thus yielding the best compromise between V CE(SAT) and low quiescent current. To remain stable, this circuit requires a bypass capacitor connected between the pin and the pin or between the pin and ground. A ceramic capacitor with a value of at least.µf is a good choice. The PNP V CE(SAT) varies with load current as shown in Figure. This voltage drop (V DROP ) can be accounted for when using the pin as the feedback node by setting the output voltage according to the following formula: R R + V DROP = V REF In addition, the disconnect circuit has a built in current limit of ma (minimum) to protect the chip during shortcircuit. This feature allows the LT6 to tolerate an indefinite short, but care must be taken to avoid exceeding the maximum junction temperature. When is stepped from ground to operating voltage while the output capacitor is discharged, an inrush current will flow through the inductor and integrated Schottky diode into the output capacitor. Conditions that increase inrush current include a larger more abrupt voltage step at, a larger output capacitor tied to the pin, and an inductor with a low saturation current. While the internal diode is designed to handle such events, the inrush current should not be allowed to exceed amp. For circuits that use output capacitor values within the recommended range and have input voltages of less than V, inrush current remains low, posing no hazard to the device. In cases where there are large steps at V (more than V) and/or a large capacitor is used at the pin, inrush current should be measured to ensure safe operation. IN 6f

11 APPLICATIO S I FOR ATIO W Board Layout Considerations As with all switching regulators, careful attention must be paid to the PCB board layout and component placement. To maximize efficiency, switch rise and fall times are made as short as possible. To prevent electromagnetic interference (EMI) problems, proper layout of the high frequency switching path is essential. The voltage signal of the LT6 pin has sharp rising and falling edges. Minimize the length and area of all traces connected to the pin and always use a ground plane under the switching regulator to minimize interplane coupling. In addition, the ground connection for the feedback resistor R should be tied directly to the pin and not shared with any other component, ensuring a clean, noise-free connection. Recommended component placement is shown in Figure 6. 6 F7 VIAS TO GROND PLANE VIA TO CONTROL VIA TO Figure 6. Recommended Layout 6f

12 LT6 TYPICAL APPLICATIO S.V TO V C µf V Output Converter with Output Disconnect L µh LT6 C.µF C.µF C: TAIYO YDEN LMK7 BJMA-T C: TAIYO YDEN EMK7 BJMA-T C: TAIYO YDEN EMK7 BJMA-T L: MRATA LQHCNK 6 TA V R.M R k (V) I (ma) V TO V C µf V Output Converter with Output Disconnect L 7µH LT6 C.µF C.µF C: TAIYO YDEN LMK7 BJMA-T C: TAIYO YDEN GMK BJMG-T C: TAIYO YDEN MK BJMG-T L: MRATA LQHCN7K 6 TA V R.6M R k (V) I (ma) V TO V C µf V Output Converter with Output Disconnect sing an Inductor and 6 Capacitors L µh LT6 C.µF C.µF C: TAIYO YDEN LMK7 BJMA-T C: TAIYO YDEN TMK7 BJMA-T C: TAIYO YDEN TMK7 BJMA-T L: TAIYO YDEN LB TMR 6 TA V R.M R k (V) I (ma) f

13 LT6 TYPICAL APPLICATIO S V Output Converter with Output Disconnect.V TO V L 7µH C µf LT6 C.µF C.µF V R.M R k (V) I (ma) C: TAIYO YDEN LMK7 BJMA-T C: TAIYO YDEN GMK BJMG-T C: TAIYO YDEN MK BJMG L: MRATA LQHCN7K 6 TA V Output Converter with Soft Start.V TO V OFF ON C µf R k C.µF L µh LT6 C.µF C.µF V R.M R k (V) I (ma) C: TAIYO YDEN LMK7 BJMA-T C: TAIYO YDEN GMK BJMG-T C: TAIYO YDEN EMK7 BJMA-T L: MRATA LQHCNK 6 TA6 6f

14 LT6 TYPICAL APPLICATIO S V Output Converter with Output Disconnect.V TO 7V L µh C µf LT6 C.7µF C.µF C pf V R.6M R k (V) I (ma).6.. C: TAIYO YDEN CE LMK7 BJMA-T C: TAIYO YDEN CE LMK BJMG-T C: TAIYO YDEN CE LMK7 BJ7MA-T L: MRATA LQHCNK 6 TA7 ±V Dual Output Converter with Output Disconnect.V TO V C µf L 7µH LT6 C D.µF C.µF C.µF C: TAIYO YDEN LMK7 BJMA-T C, C, C: TAIYO YDEN GMK BJMG-T C: TAIYO YDEN MK BJMG-T L: MRATA LQHCN7K D, D: CENTRAL CMDSH- D 6 TA I =.ma AT =.6V C.µF V R.M R k I =.ma AT =.6V 6f

15 LT6 PACKAGE DESCRIPTIO TS Package -Lead Plastic TSOT- (Reference LTC DWG # --67). MAX.6 REF.9 BSC (NOTE ). REF. MAX.6 REF. MIN. BSC..7 (NOTE ) PIN ONE ID RECOMMENDED SOLDER PAD LAY PER IPC CALCLATOR.6 BSC..6 PLCS (NOTE )..9. BSC DATM A. MAX.... REF.9..9 BSC (NOTE ) TS TSOT- NOTE:. DIMENSIONS ARE IN MILLIMETERS. DRAWING NOT TO SCALE. DIMENSIONS ARE INCLSIVE OF PLATING. DIMENSIONS ARE EXCLSIVE OF MOLD FLASH AND METAL BRR. MOLD FLASH SHALL NOT EXCEED.mm 6. JEDEC PACKAGE REFERENCE IS MO-9 Information furnished by Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 6f

16 LT6 TYPICAL APPLICATIO S.V TO V C µf DAC µc V Output Converter with Variable Output Voltage and Shutdown L µh LT6 C.µF C.µF 6 TA9 V R.M R k (V) I (ma) C: TAIYO YDEN LMK7 BJMA-T C: TAIYO YDEN GMK BJMG-T C: TAIYO YDEN GMK BJMG-T L: MRATA LQHCNK RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT6 ma (I ),.MHz, High Efficiency =.9V to V, (MAX) = V, I Q = ma, I SD = <µa, Step-p DC/DC Converter ThinSOT Package LT6/ ma/ma (I ), Constant Off-Time, =.V to V, (MAX) = V, I Q = µa, I SD = <µa, LT6- High Efficiency Step-p DC/DC Converter ThinSOT Package LT6 Constant Current, Constant Voltage,.MHz, =.6V to V, (MAX) = V, I Q =.ma, I SD = <µa, High Efficiency Boost Regulator MS Package, p to 6 White LEDs LT9 Constant Current,.MHz, High Efficiency = V to V, (MAX) = V, I Q =.ma, I SD = <µa, White LED Boost Regulator ThinSOT Package, p to White LEDs LT97 Constant Current,.MHz, High Efficiency =.V to V, (MAX) = V, I Q =.9mA, I SD = <µa, White LED Boost Regulator SC-7, ThinSOT Packages, p to White LEDs LT9 Dual Output ma (I ), Constant Off-Time, =.V to V, (MAX) = V, I Q = µa, I SD = <µa, High Efficiency Step-p DC/DC Converter MS Package LT9- Dual Output ma (I ), Constant Off-Time, =.V to V, (MAX) = V, I Q = µa, I SD = <µa, High Efficiency Step-p DC/DC Converter MS Package LT9 Dual Output, ±ma (I ), Constant Off-Time, =.V to V, (MAX) = ±V, I Q = µa, I SD = <µa, High Efficiency Step-p DC/DC Converter MS Package LTC/ Low Noise, MHz, Regulated Charge Pump =.7V to.v, I Q = ma, I SD = <µa, LTC- White LED Driver MS, ThinSOT Packages, p to 6 White LEDs LTC Low Noise,.7MHz, Regulated Charge Pump =.7V to.v, I Q = 6.mA, I SD = <µa, White LED Driver MS Package, p to 6 White LEDs LTC Low Noise,.MHz, Regulated Charge Pump =.7V to.v, I Q = ma, I SD = <µa, White LED Driver MS Package, p to White LEDs LTC/ 6mA (I ),.MHz, Synchronous =.V to V, (MAX) = V, I Q = 9µA/µA, I SD = <µa, LTCB Step-p DC/DC Converter ThinSOT Package LTC A (I ), MHz, Synchronous =.V to V, (MAX) = 6V, I Q = µa, I SD = <µa, Step-p DC/DC Converter MS Package LTC A (I ), MHz, Synchronous =.V to V, (MAX) = 6V, I Q = µa, I SD = <µa, Step-p DC/DC Converter MS Package 6 Linear Technology Corporation 6 McCarthy Blvd., Milpitas, CA 9-77 () -9 FAX: () -7 LINEAR TECHNOLOGY CORPORATION 6f LT/TP K PRINTED IN SA