Gamma-ray Large Area Space Telescope (GLAST) Large Area Telescope (LAT) DAQ. Latch-up Test of 3 DC-DC MAXIM Converters

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Page 1 of 11 Document # Date Effective LAT-TD-2234-1 6/6/3 Author(s) Supersedes Riccardo Rando Hartmut Sadrozinski GLAST LAT Jozsef Ludvig PROCUREMENT DOCUMENT Subsystem/Office DAQ Document Title Latch-up Test of 3 MAXIM DC_DC Converters Gamma-ray Large Area Space Telescope (GLAST) Large Area Telescope (LAT) DAQ Latch-up Test of 3 DC-DC MAXIM Converters

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 2 of 11 CHANGE HISTORY LOG Revision Effective Date Description of Changes 1 6/6-3 Original version

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 3 of 11 1. PURPOSE Single event latch-up (SEL) testing of three MAXIM DC-DC converters has been carried out on June 6 23 at the INFN Laboratory Legnaro to identify their suitability as flight parts for GLAST LAT. 2. SCOPE The GLAST LAT is testing the radiation hardness of MAXIM DC-DC converters as a preliminary step for their use as flight parts. Suitable TID hardness has been found in Ref. [6], but latch-up resistance has to be proven too. The full radiation testing is planned for later. Here we report the results from an preliminary latch-up testing of three identical parts to the one of Ref.[6] at the INFN laboratory at Legnaro (LNL). The heavy ion was Bromium with an LET = 38.6 MeV/(mg/cm 2 ), and the fluences were 1*1 7 cm -2 for each of the three DC-DC converters. The parts were irradiated powered, but without latch-up detection circuit, i.e. only protected by the over-current protection of the Agilent nnnn power supply set twice twice the nominal currents. One latch-up was observed in one of the converters (MAXIM1524), after a fluence of 5*1 6 cm -2. After resetting the power supply, we continued the irradiation for another 15*1 6 cm -2, without further latch-up. No Latch-up was observed in MAXIM1524 or MAXIM724. 3. DEFINITIONS 3.1 Acronyms ASIC DAQ DC GLAST H.I. INFN LAT LET LETth LNL SEE SEL SEU TEM TID VC Application Specific Integrated Circuit Data Acquisition System Direct Current Gamma-ray Large Area Space Telescope Heavy Ions Istituto Nationale di Fisica Nucleare Large Area Telescope Linear Energy Transfer Linear Energy Transfer Threshold Laboratori Nationali di Legnaro Single Event Effect Single Event Latch-up Single Event Upset Tower Electronics module Total Ionizing Dose Vacuum chamber 3.2 Definitions cm deg ev centimeter degree Electron Volt

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 4 of 11 km kilometer krad 1 rad MeV Million Electron Volt mg milligram min minute rad unit of TID s, sec second y year 4. APPLICABLE DOCUMENTS Response to AO 99-OSS-3. P. Michelson et al, GLAST Large Area Telescope, Flight Investigation: An Astro-Particle Physics Partnership Exploring the High- Energy Universe., Nov 1999. 433-SPEC-1 GLAST Mission System Specification, CH 7, 5/2/2 http://www.lnl.infn.it/ http://sirad.pd.infn.it/ INFN LNL web site INFN Padova web site Application notes for DC-DC converters: http://pdfserv.maxim-ic.com/arpdf/max724-max726.pdf http://pdfserv.maxim-ic.com/arpdf/max1522-max1524.pdf http://pdfserv.maxim-ic.com/arpdf/max189.pdf 4.1 References [1] LAT-SS-287 Conceptual Design of the LAT DAQ [2] http://sirad.pd.infn.it/glast/docs/guidelines.pdf [3] LAT-TD-1172 GLAST LAT Readout Controller ASIC SEE Test at LNL [4] LAT-TD-1632 GLAST LAT Front End ASIC GTFE SEE Test at LNL [5] LAT-TD-2224 TID Test of MAXIM 183 DC-DC Converters [6] LAT-TD-2225 TID Test of 3 MAXIM DC-DC Converters [7] LAT-TD-zzzz SEE Testing of LAT TKR Flight ASICS [8] LAT-TD-yyyy SEL Testing of LAT DAQ ASICS

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 5 of 11 5. Latch-up Test of 3 MAXIM DC_DC Converter 5.1 Devices Three MAXIM DC-DC converters were tested. The data sheet for these converters can be found at: http://pdfserv.maxim-ic.com/arpdf/maxnnnn-maxnnnn.pdf. There characteristics are shown in Table 1. Two are CMOS devices (189 and 1524), and the third (724) is a bipolar device. The DC-DC converters efficiency is dependent on their current output. Each part was de-lided and mounted on a special evaluation board, developed by SLAC, shown in Figure 1, and 2, which was mounted on a heavy Al heat sink which in turn attached to the irradiation fixture to be inserted into the vacuum chamber holder of the heavy ion accelerator [2]. Note that the board containing the surface mounted MAX189 had a hole drilled through the PWB and was mounted backwards facing the beam. The output load resistors were mounted on the outside of the vacuum chamber, and the voltages cross them were monitored with a DVM to determine the output power. In addition, the input voltages and currents were monitored. 5.2 Irradiations For H.I., the DC-DC converters are tested in the vacuum chamber. Only one H.I. species was used, Bromium which has a surface LET = 38.6 MeV/(mg/cm 2 ) which matches the maximum GLAST LET required as per ICD. The ions were delivered over an area of 2cm x 2cm, much larger than the area of the DC-DC converters. The uniformity of the fluence over the area of the ASICs was measured to be better than 5% and was continuously monitored during the runs. The first 1% of the fluence was delivered with a low rate of about 4k/spill, and the remainder with a flux about 1-2 times that number. 5.3 Experimental Setup Testing before, during and after irradiation were be performed in the INFN laboratories located in Padova and at the INFN Legnaro Laboratory, near Padova. Power was delivered to each device under test separately, while located inside the vacuum chamber, from a Agilent power supply with the current limit set at about twice the nominal input current (Table 2). The status of the power supply and the DVM measuring the output current was monitored constantly with the help of a video camera. The load resistance defines the output current. The efficiency of the chips is defined as the ratio of output power to input power: ε Pin Pout The efficiency calculated does not take into account the resistance of cable and is such only relative. 5.4 Testing steps Visual inspection

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 6 of 11 The test boards were examined for damage. All cables and connectors were checked for proper connections and shown to be intact. Lab Test The association of DC-DC converters with their individual power lines were confirmed. The current drawn by the parts were measure in the lab. The nominal currents are shown in Table 1. No SEL were be observed in 1 tests, in normal operation, but SEL was detected when the power lines were shorted out. Placement of DUT in the vacuum chamber The DC-DC converters was inserted in the vacuum chamber and the flange was placed into position but not sealed. The vertical position of the chip inside the VC was checked visually through the port window to ensure that a correct positioning will be obtained during irradiation. The holder was moved to its extreme positions to ensure that the cables are correctly placed and would cause no problems during the irradiations. After mounting in the vacuum chamber, the currents drawn by the test boards were checked and agreed with standard values Functionality test prior VC sealing Before sealing the VC the currents were retested and agree with standard values of Table 1. Then the VC was sealed and pumps activated. Beam setup During the beam setup the test board remained outside the beam window, to ensure the chips could not get irradiated in case a failure of the beam positioning arises. After the beam was correctly prepared and its uniformity had been measured with the dosimetry diodes, the beam was intercepted with the FC and the test board was put in position. The power consumption of the test board was checked to be normal. Irradiation The FC was removed and the fluence monitoring showed the beginning of the irradiation phase. The progress of the irradiation could be monitored on the computer screen indicating the fluence delivered, and on the video screen as to the status of the power supplies. After each irradiation step, the positioning was tested again visually, and then the complete testing sequence repeated on another chip. 5.5 Results The results of the SEL testing are summarized in Table 2. For each of the DC-DC converters, the fluence is shown and the number of Latch-ups observed. As mentioned before, the ASICs were scheduled to be irradiated with 1*1 7 cm -2. Two of the converters ( MAXIM724 and MAXIM189) did not show any transients with the power supply compliance set to about twice the nominal current (table 2). The third part (MAXIM1524) showed a latch-up after a fluence of about 5*1 6 cm -2. After

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 7 of 11 resetting the power supply, we continued the irradiation for another 15*1 6 cm -2, without further latch-up. No excess of current was detected after each irradiation step. The output voltage across the load resistor and the efficiency are shown as a function of the fluence in Figs. 2-4 for each of the parts.

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 8 of 11 PART Vin [V] Iin [ma] Pin [W] Rout [:] Vout [V] Iout [A] Pout [W] Efficiency MAXIM 724 MAXIM 1523 MAXIM 189 24. 148. 3.55 2.14 1.82.85 1.55.44 5. 12..6 317. 11.8..5.77 5. 265. 1.33 1.56 1.12.72.8.61 Table 1: The 3 MAXIM DC-DC converters tested. PART Fluence Vin [V] Iin [ma] Pin Vout [V] Iout [A] Pout Efficiency MAX724 24. 148. 3.55 1.82.85 1.55.44 1 24. 15. 3.6 1.94.91 1.76.49 1.62E+6 24. 125. 3. 1.6.75 1.2.4 2.6E+6 24. 121. 2.9 1.55.72 1.12.39 3.6E+6 24. 124. 2.98 1.54.72 1.11.37 1.1E+7 24. 125. 3. 1.6.75 1.2.4 MAX189 5.1 265. 1.33 1.12.72.8.61 1 5.1 248. 1.24 1.5.67.71.57 3.5E+5 5.1 248. 1.24 1.6.68.72.58 5.61E+5 5.1 248. 1.24 1.6.68.72.58 5.9E+6 5.1 248. 1.24 1.6.68.72.58 1.1E+7 5.1 248. 1.24 1.6.68.72.58 MAX1524 5.1 13..65 11.4 3.78E-3.43.66 1 5.1 13..65 11.78 3.9E-3.46.71 5.E+5 5.1 12..6 11.8 3.91E-3.46.77 7.5E+5 5.1 13..65 11.8 3.91E-3.46.71 3.E+6 5.1 11..55 11.81 3.91E-3.46.84 5.3E+6 5.1 11..55 11.81 3.91E-3.46.84 SEL! 5.3E+6 2.5 3..75 2.5 8.29E-4.2.3 6.7E+6 2.5 3..75 2.5 8.29E-4.2.3 6.7E+6 5. 11..55 11.81 3.91E-3.46.84 7.6E+6 5. 11..55 11.81 3.91E-3.46.84 1.28E+7 5. 11..55 11.79 3.91E-3.46.84 2.16E+7 5. 11..55 11.78 3.9E-3.46.84 Table 2: Efficiency vs. fluence of the 3 MAXIM DC-DC converters tested.

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 9 of 11 Figure 1 The 3 MAXIM DC-DC converter test boards, with the location of the chips indicated

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 1 of 11 Figure 2 The layout of the 3 MAXIM DC-DC converter test boards, with the location of the chips indicated

LAT-TD-2234-1 Latch-up Test of 3 MAXIM DC-DC Converters Page 11 of 11 MAX724 Efficiency vs. H.I. Fluence 1 1.8.8.6.6.4.4.2 Eff (724 ) 5->2.5 Iout [A].2 2 1 6 4 1 6 6 1 6 8 1 6 1 1 7 1.2 1 7 Fluence [cm -2 ] MAX189 Efficiency vs. H.I. Fluence 1 1.8.8.6.6.4.4.2 Eff (189 ) 5->1.2 Iout [A].2 2 1 6 4 1 6 6 1 6 8 1 6 1 1 7 1.2 1 7 Fluence [cm -2 ] MAX1524 Efficiency vs. H.I. Fluence.5.4 SEL 1.8.3.6.2.4.1 Eff (1524 ) 5->12 Iout [ma].2 5 1 6 1 1 7 1.5 1 7 2 1 7 2.5 1 7 Fluence [cm -2 ] Fig.3: Output Current and Efficiency vs. H.I. Fluence for the 3 DC-DC Converters.