COMPARISON OF HIGH EFFICIENCY SOLAR CELLS ON LARGE AREA N-TYPE AND P-TYPE SILICON WAFERS WITH SCREEN-PRINTED ALUMINUM-ALLOYED REAR JUNCTION

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COMPARISON OF HIGH EFFICIENCY SOLAR CELLS ON LARGE AREA N-TYPE AND P-TYPE SILICON WAFERS WITH SCREEN-PRINTED ALUMINUM-ALLOYED REAR JUNCTION D.S. Saynova, V.D. Mihailetchi, L.J. Geerligs, and A.W. Weeber ECN Solar Energy, PO Box 1, 1755 ZG Petten, The Netherlands ABSTRACT Low-cost, high-efficiency, and large area n-type silicon cells can be processed based on the screen printed Aluminum-alloyed rear junction concept. This process uses fabrication techniques which are very close to the current industry-standard screen printed -Si cell process. We compare, by experimental tests and modeling, the differences of using n-type wafers and p-type wafers with this process. An independently confirmed record-high efficiency of 17.4% is achieved on n-type floatzone () silicon wafers (area 140 cm²). On p-type wafers, with the same process 17.6% is obtained, and 16.8% on p-type Cz wafers. Model calculations allow us to identify the potential for further enhancement of the n-type cell efficiency to slightly above 18.0% by improving front surface passivation. We also discuss experimental characteristics of cells produced by this process from n-type multicrystalline wafers. INTRODUCTION The vast majority of today s commercial silicon solar cells are made from p-type doped material. More than 80% of the produced solar cells have a homogeneous emitter, a PECVD-SiN layer as antireflective coating, and screen printed contacts on both sides. For the backside, an aluminum paste is used to create a back surface field during the contact co-firing. Recently, n-type silicon materials have received much interest as they are considered promising candidates for future generations of high-efficiency solar cells. However, in spite of these advantages, the n-type solar cells are not yet abundantly produced in industry. In order to realize this, n-type silicon solar cells must have stable efficiencies of at least the same level as for p-type. A few solar cell concepts based on n-type Si materials are currently under investigation. One of these concepts, investigated in this paper, is the Al-alloyed back-junction cell [3-10]. This concept was introduced for the first time by EBARA Solar Inc. in 000 [9]. Cell efficiencies up to 17.0% were reported [7]. It represents a fast way, for industry, to move from p-type to n-type substrates because of the possibility of maintaining the same process sequence. The only difference, compared with the conventional p-type (n + pp + ) process used in industry for p-type wafers, is that during the phosphorus diffusion a front surface field is created instead of an emitter, and during the contact co-firing the aluminum back junction is formed. Aluminum rear-junction cells are also an interesting and simple approach to study and identify the material limitations for all back-contacted solar cells, in particular, for multicrystalline n-type substrates. In this paper we present results on our n-type cell development based on the Al back-junction. We compare by experimental tests and modeling the differences of using n-type wafers versus p-type wafers, applying the same processing sequence. We present an independently confirmed record-high efficiency of 17.4% based on n-type float zone () wafers, which demonstrates the potential for high efficiency of this n-type process. On p-type wafers with the same process 17.6% was obtained, whereas 16.8% was obtained on p-type Cz wafers. EXPERIMENTAL PROCEDURE The cell process was mainly focussed on 148.5 cm n- type and p-type monocrystalline silicon wafers, but results on 156.5 cm industrial n-type multicrystalline silicon (-Si) wafers are also presented in this paper. The cell process we used is based on in-line processing for diffusion, co-firing, and on process steps which can be industrialized. It starts by a texture etch (industrial isotexture, or random pyramids) of the surface. Then the front-surface field (n-type wafer) or front emitter (p-type wafer) is formed by phosphorus diffusion in an infrared conveyor belt furnace from a spin-on source. To improve the accuracy of our modeling, and investigate the potential improvements in cell efficiency by improvement of the front properties, two front diffusions were tested: one standard diffusion ( 60 Ohm/sq) and one diffusion for improved front surface properties. Subsequently, a rear side polishing etch is carried out followed by the phosphorus glass removal and the PECVD SiN x antireflection coating deposition on the front side. This process sequence does not further require wafer dicing or other methods for junction isolation, and thus the entire initial wafer area is used. The silver grid is then screenprinted on the SiN x front side, followed by screen-printing of Al on the whole rear side of the cell. Both contacts are co-fired in an infrared conveyor belt furnace, thus forming also the p + emitter (n-type wafer) or BSF (p-type wafer) at the rear. The process flow chart and a schematic cross section of the Al back junction solar cell are shown in Fig. 1. CELL PROCESS AND RESULTS Effect of base resistivity and front diffusion Table 1 summarizes solar cell parameters obtained for

n-type -Si and substrates of different base resistivities, and for the two different front diffusions. It is observed that the highest n-type cell efficiency is obtained for high substrate resistivity. This is in agreement with model calculations [4,8], which show that, in order to benefit from the full potential of this type of solar cell, the wafer resistivity should typically be higher than 10 Ωcm. 5 the monocrystalline cells above (6.0 10 cm/s), but with a considerable lower bulk lifetime of only 8 µs (as obtained from PC1D fit). The ratio of diffusion length and substrate thickness (Ld/W) must be higher than.5 for good cell performance [11]. To meet these conditions, the effective lifetime of the multicrystalline substrates must be higher than 130 µs. Fortunately, resistivity and bulk lifetime usually go together: increasing bulk resistivity also increases the bulk lifetime. wafer best average best average ρ [Ωcm] 0.8 1 3.8 30 30 5 31 31 Jsc [ma/cm ] 19.77 9.7 30.74 34.41 34.34 ± 0.1 31.4 34.75 34.7 ± 0.06 Voc [mv] 589 580 60 67 67 ±1 58 66 63 ±3 FF 73.7 7.1 77.9 74.8 74.1 ±0.6 74.5 77. 76.8 ±0.4 η 8.6 1.4 14.9 16.1 15.9 ±0.1 13.6 16.8 16.6 ±0. Table 1. Effect of base resistivity (ρ) and front diffusion on n-type and -Si cell properties. All cell surfaces are isotextured. Above dashed line: standard front diffusion. Below dashed line: optimised front diffusion. The area of the solar cells is 156.5 cm for -Si cells and 148.5 cm for monocrystalline cells. Fig. 1. Process flow chart (a) and the schematic cross section (b) of the resulting n-type back junction cell. To understand the effect of base resistivity, we investigated the internal quantum efficiency (IQE) of cells with base resistivity of 3.8 and 30 Ωcm. The standard phosphorus diffusion was used. Fig. shows the experimental IQE (symbols) together with the PC1D fit (lines) using a measured front doping profile and surface reflection, and assuming a constant Al doping profile for the rear junction. The relevant fit parameters for the modelling are the bulk lifetime and the front surface recombination velocity (SRV). The IQE at lower wavelengths is completely determined by the SRV. The bulk lifetime is very high (>1 ms), and does not limit the IQE. The fit to experimental data reveals a SRV of 5 6.0(±1) 10 cm/s independent of the base resistivity. The bulk lifetime must be taken into account, however, for multicrystalline wafers. The IQE fit of the multicrystalline cell with base resistivity 0.8 Ωcm from Table 1 reveals the same SRV value as that obtained for Fig.. Internal quantum efficiency data (symbols) of the ntype solar cells with different base resistivity and PC1D fit (lines), taking into account the measured front doping profile, surface reflection, wafer resistivity, and wafer thickness. Lowering the front surface recombination velocity Currently we are investigating ways to reduce the SRV of these types of cells and, thus, to further improve their efficiency. In the lower part of Table 1 (below dashed line) the results for an improved phosphorus diffusion are shown. It is observed that a higher Jsc is achieved by engineering the FSF diffusion and improving the cell

process. In other experiments we also observed improvements in V oc up to 1 mv due to the improved front diffusion [1]. However, the V oc results show more scatter. As a result of the new process, the SRV was further reduced to 8.5(±1.5) 10 4 cm/s (determined by fitting the IQE data). Model calculations [1] indicate that the gain in J sc and V oc of the cells is indeed due to a lower SRV. Best cell efficiencies for p-type and n-type substrates The best cell results are obtained using a random pyramids texture etched surface and the optimized diffusion. The conversion efficiencies that we reached on n-type wafers are 17.3% on 148.5 cm, and 17.4% on 140 cm (after dicing away the unprinted Al area on the rear side), independently confirmed at Fraunhofer ISE CalLab, Freiburg, Germany. To our knowledge, this is the highest efficiency obtained for n-type silicon solar cells featuring a screen-printed aluminum rear-emitter. Table shows best results for n-type cells, as well as for p-type cells processed in the same way. Clearly, for the diffusion parameters used, the results on the two types of wafers do not differ much. Fig. 3 shows that the internal quantum efficiencies are indeed comparable. However, compared to p-type Cz wafers the n-type process performs better. It is expected that n-type Cz wafers will perform as well as the n-type wafers (n-type Cz wafers of appropriate resistivity were not available for tests). The Voc of 633 mv for the n-type cells is among the highest measured on large area (148.5 cm ) solar cells featuring screen printed contacts and is already close to the V oc limit (about 64 mv) of an Al-alloyed rear full area emitter cell [10, 13]. It is clear that for n-type -Si wafers, it is difficult to obtain sufficient performance. In the comparison of the -Si cells in Table it should also be noted that the p- -Si cells were processed on wafers from the upper part of an ingot, which results in some reduction of cell efficiency due to increased crystal defect density. Si ST ρ [Ωcm] Jsc [ma/cm ] Voc [mv] FF η n- IS 5 31.4 58 74.5 13.6 p- IS 1.5 33.5 603 76.6 15.5 n- IS 31 33.7 633 78.8 16.6 n- RP 31 35.53 63 77.4 17.4 p- RP.4 35.5 66 79.0 17.6 p-cz RP 1.1 35.76 617 76.0 16.8 Table. Parameters of the best fabricated solar cells on and -Si substrates. The area of the solar cells is as in Table 1. ST - surface texture. Fig. 3. Internal quantum efficiency (IQE) data of the best monocrystalline p-type and n-type solar cells. Fig. 4. Calculated solar cell efficiency as a function of surface recombination velocity for an n-type with a resistivity of 30 Ωcm. The calculation is done considering a FF of 78.8% and a random pyramid texture surface. The parameters used in the calculation are those found by fitting the experimental data of Figure. Potential of n-type FSF cell process In Fig. 4 a model calculation for the conversion efficiency versus SRV is shown. The starting point of this calculation was the experimental data of the 17.4% efficiency cell. It is clear from the figure that efficiencies only slightly over 18% can be obtained even after fully minimizing SRV. With the FF reaching 79% there are two major factors left that limit the efficiency of this industrial screen-printed aluminium rear-emitter cell: Firstly, the metallization shading of the front surface (which amounts to 7.5% in our cells), and, secondly, the fundamental limitation imposed on V oc (and J sc), of approximately 64 mv, due to recombination that occurs in the Al-alloyed emitter. Cuevas et al. [10] have reported that the recombination current density in the p + region formed by screen printed aluminium and alloying cannot be lower

than approximately 5 10-10 ma/cm. Such recombination can drastically limit the J sc and V oc of a cell even if front SRV is minimized and high quality wafers are used [10, 13]. Recently Bock et al. [14] reached 50 fa/cm using low temperature annealed a-si as surface passivation layer on the rear aluminum-doped emitter, after etching away the metallic aluminum layer. Preliminary modeling shows this could increase the cell efficiency by about 0.%. n-type -Si substrates As Fig. 5 shows, the n-type -Si cells are strongly limited by the poor performance at crystal defects for short and middle wavelengths, which the slightly better performance at long wavelengths (compared to p-type wafers) cannot compensate for. From the cell results in Table, it seems that in n-type -Si cells especially the V oc is suppressed. In addition, the n-type -Si wafers that we have used originate from the edge of an ingot (top edge in Fig. 5) which also reduces performance. p-type -Si λ = 404nm the center of an ingot. It is known that 130 µs lifetime, which is good enough to reach high efficiencies on homogeneous substrates, can be obtained quite well in n- type -Si. The main issue is, however, to produce sufficiently homogeneous -Si. CONCLUSIONS We have demonstrated that a low cost process of fabricating n-type solar cells based on the Aluminum rearemitter concept leads to a new record efficiency of 17.4% for large area monocrystalline substrates. The same process on p-type monocrystalline substrates resulted in 17.6% () and 16.8% (Cz) efficiency. By improving the front surface passivation somewhat higher efficiencies can still be realized on n-type wafers with this process, but the results are already quite close to fundamental limitations due to the rear Al emitter. High efficiencies may also be conceivable on n-type multicrystalline substrates if those can be produced with high lifetime and, especially, high homogeneity. ACKNOWLEDGEMENTS The authors would like to thank Radovan Kopecek and Thomas Buck for cooperation and stimulating discussions, and Ingo Röver and Karsten Wambach for cooperation and providing the n-type -Si wafers. This work was supported by SenterNovem. The investigated -Si wafers were produced in the EC NESSI project, contract ENK6-CT-00-00660. n-type -Si λ = 404nm λ = 976nm λ = 976nm REFERENCES [1] D. MacDonald, L.J. Geerligs, Appl. Phys. Lett., 85, 004, 4061. [] J.E. Cotter et al., 15 th Workshop on Crystalline Silicon Solar Cells & Modules: Materials and Processes, 005, 3. [3] A. Ebong et al., 10 th Workshop on Crystalline Silicon Solar Cells & Modules: Materials and Processes, 000, 34. [4] T. Buck et al., Proceedings of the 19 th European Photovoltaic Solar Energy Conference, 004, 155. [5] T. Buck et al., Proceedings of the 15 th International Photovoltaic Science and Engineering Conference, Shanghai, 005, 97. [6] P. Hacke et al., Proceedings 19 th European Photovoltaic Solar Energy Conference, 004, 19. Fig. 5. Local light beam induced current data of the p-type (top) and n-type (bottom) -Si solar cells from Table. Light is 404nm wavelength. Bottom right insets in both images: light of 976nm. Same scale in both figures. The best efficiency we obtained so far is 13.6%, while Kopecek et al [8] have reported 14.4% for a wafer from [7] C. Schmiga H. Nagel, and J. Schmidt, Progress in Photovoltaics: Research Applications, 14, 006, 533. [8] R. Kopecek et al., Proceedings of 4 th World Conference on Photovoltaic Energy Conversion, 006,. [9] D.E. Meier et al., Solar Energy Materials and Solar

Cells, 65, 001, p. 61. [10] A. Cuevas et al., Proceedings of 3 rd World Conference on Photovoltaic Energy Conversion, 003,. [11] E. Ebong, et al., Proceedings of 4 th World Conference on Photovoltaic Energy Conversion, 006. [1] V.D. Mihailetchi et al., Proceedings th European Photovoltaic Solar Energy Conference, 007, 837. [13] R.M. Swanson, acceptance of the W. Cherry award, 9 th IEEE Photovoltaic Specialists Conference, New Orleans, 00,. [14] R. Bock, J. Schmidt and R. Brendl, Appl.Phys.Lett. 91, 007, 1111.