Static Switches fr their use n Capacitrs Batteries cnnectin Rger Camell, Quim López, Miquel Teixidó, Hectr Rivas, Antni Sudrià CITCEA UPC Barcelna, Spain Abstract Nwadays, mst f the Reactive Pwer Cmpensatin applicatins wrk with electrmechanical switches, but there are sme applicatins that require fast respnse in cmpensatin, like, fr example, sldering industry. There are ther applicatins that need a cnnectin withut disturbance generatin. The cnnectin f capacitrs batteries can affect, fr example, near electrnic equipment. These prblems can be slved using a Static Switch instead f an electrmechanical switch. This paper presents a study abut different typlgies f Static Switches fr their applicatin n cntrlling Capacitrs Batteries cnnectin. T begin with, the paper shws a brief descriptin f mains characteristics f Static Switch. Then, five different structures are presented. These structures are based n different cmbinatins f thyristrs and dides: 4T (fur thyristrs), 6T (six thyristrs), 6TS (six thyristrs with single-phase capacitrs), 3T-3D (three thyristrs and three dides), 2T-2D (tw thyristrs and tw dides). The behaviur f each structure has been simulated n its pening and clsing states and are discussed the advantages and disadvantages f using each f it. Finally, is reprted which structure has been chsen and are attached sme real experiments made with a prttype. I. INTRODUCTION The differences between cnnecting batteries f capacitrs with a Static Switch r with Electrmechanical Switches are, basically: Fast cnnectin f switches at the desired mment and a cnnectin made in the zer-crss vltage f the terminals f the switch; this means that the thyristr clses when the vltage f the capacitr is the same as the net. An electrmechanical switch des nt allw fast cnnectins because f its cnstructin. The ther prblem is that electrmechanical switch cnnects the battery with the net independently f the vltage in its terminals; this can cause electrical disturbances n the net. These disturbances can affect near equipments implying EMC prblems. These prblems d nt appear with a static switch. A digital cntrl in a static switch permits an accurate cnnectin in the zercrss vltage and cmmutatins at high frequencies. In a cntrl f a static switch there are tw basic fields that require a previus study befre begin wrking n it. The first is the study f the ptimum structure fr the switch. The secnd is the study f the driver circuit fr triggering the semicnductrs. This paper is based n the first study; this is treated n the secnd sectin. There, different structures are prpsed, simulated and evaluated. One structure is chsen fr wrking n it and are explained the reasns why this is chsen amng all. Apart frm slving the prblems f electrmechanical switches, a digital cntrl fr a static switch can add cmplementary functins like cmmunicatins, cntrlling the switch in case f ver and undervltage, cntrlling the temperature f the equipment On the third sectin is presented a prttype made with the chsen structure. Simulatin results and its digital cntrl are described.
II. PROPOSED STRUCTURES C 2 = 0 = = sin( ωt) = 2 400 sin(60) = 490 C1 C3 In this paper is presented a study f five basic structures f static switches fr wrking n capacitrs cnnectin. The structures studied are: 4T (fur thyristrs), 6T (six thyristrs), 6TS (six thyristrs with single-phase capacitrs), 3T-3D (three thyristrs and three dides), 2T-2D (tw thyristrs and tw dides). where is the amplitude f the wave. At that pint, the resultant circuit is Fig 3. circuit: The structures are evaluated accrding t: Maximum vltages that capacitrs and thyristrs can reach, life expectancy f elements, cntrl f the system and ecnmical reasns. The 6TS cnfiguratin is nly presented as an example f single-phase capacitrs cnnectin because this paper is fcused n capacitrs triangle cnnectin. Figure 1. 6TS cnfiguratin 4T and 2T-2D typlgies are, ecnmically, the mst viable structures. 4T and 2T-2D have nly 4 semicnductr devices, and 6T and 3T-3D have 6. The lwer number f devices will suppse a difference n the behavir t. S, it will be necessary t make a study f the electric cnditins f each typlgy. All the examples presented n this paper are suppsed t wrk in a three-phase, well-balanced, 400 net. This net wrks withut any distrtin. A. 4T Figure 3. 4T with ne switch pened S, since the mment the T1 switch is pened, and befre the T2 current is extinguished, the capacitrs C1 and C2+C3 are being charged until they reach maximum net value. Then, the final vltages f capacitrs at the mment f T2 aperture are: C 2 C1 C3 = 2 400 = 565.6 2 400 = 490 + = 772.8 2 2 400 = 490 + = 207.2 2 Being knwn capacitrs vltages is easy t knw maximum vltage n thyristrs: Thyristr = 2 400 + 772 = 1338 S, maximum vltage supprted fr capacitrs is: Capacitr = 772 Fig. 4 shws capacitr vltage in red and thyristr vltage in blue. When the switch is clsed, vltage at thyristrs becmes zer while capacitrs charge. When the switch is pened, the capacitrs discharge with a velcity depending n discharge resistrs values: Figure 2. 4T cnfiguratin If the behavir f 4T typlgy is studied, is pssible t bserve that since the mment that the rder f aperture is made, the thyristr wait until its current becmes zer t pen the circuit. T develp an example with this cnfiguratin it is suppsed that grup f thyristrs T1 pen befre grup f thyristrs T2. At the mment f T1 aperture the vltage at capacitrs are: Figure 4. Switch cmmutatin
B. 6T vltages at thyristrs and current at thyristrs with a determined value f discharge resistrs. Figure 5. 6T cnfiguratin In this typlgy, the behavir f the structure is a bit different frm 4T structure. When all branches are pened, battery f capacitrs is flating. When the first branch f thyristrs clses, this is traduced int vltages redistributin. In this redistributin, the wrst case that culd succeed is that ne f the tw branches wuld supprt maximum vltage. Using the same example as 4T, the maximum vltage that thyristrs can achieve is 1338 t. But this is an especial case, because in the mst f cases, thyristrs have t supprt less than this vltage, instead f 4T structure, in which every pening time thyristrs are supprting this vltage. If it is cnsidered the ideal situatin where capacitrs d nt discharge, vltage at capacitrs (first graph) and vltage at switch (secnd graph) are: C. 2T-2D Figure 7. ltages and currents with discharge resistrs Figure 8. 2T2D cnfiguratin 2T2D typlgy implies the same vltage at thyristrs that 4T, but here there is always a phase cnnected t the net. This means that battery f capacitrs is always cnnected permanently at rectified vltage f the net (taking the same example as 4T, it is 565). Figure 6. ltages at capacitrs and thyristrs with 6T cnfiguratin S, it can be bserved that, depending n the pening sequence, is pssible that ne f the branches f thyristrs des nt clse crrectly because its vltage des nt reach zer vlts. Here tw slutins are suggested. First, if there is a prper cntrl f the switch, is pssible t pen and clse as desired, s this kind f prblem will nt appear. Secnd, if apprpriated discharge resistrs are used, after determined time the capacitrs will be discharged, s it will be pssible t clse thyristrs anther time independently f any pening-clsing sequence. On next graph is shwn: ltages at capacitrs, When tw dides are used instead f tw thyristrs, the cntrl can be delayed ne perid with regard t 4T. Since pening rder is made until switch pen, in the wrst case it wuld suppsed ne perid. This is because in thyristr+dide mdule, if pening rder is dne when thyristr is n; the dide wn t pen because it has n cntrl, and will pen the thyristr n next cicle. In thyristr+thyristr mdules if pening rder is dne when thyristr is n, the ther thyristr will pen, s an pening rder can nly be delayed a half cicle. On next figure are shwn vltages at capacitrs, vltages at switches and currents at 2T2D switches respectively. In this figure, tw pssible pening situatins are presented. Lking at vltages at switches (2 nd graph) it can be seen that, at first pening state, 2 nd branch (in blue) delays its aperture ne perid. At secnd pening state it can be seen that 1 st branch (in red) pens just after 2 nd branch withut delay.
pssible t cntrl nly the thyristr part, this is, the half f the mdule. This structure des nt permit cmmutatins as fast as structures where all elements are thyristrs, as explained at C sectin. The cntrl f a structure like 2T2D will be cheaper but apprpriate nly fr slw cmmutatins. III. SIMULATION MODEL Figure 9. ltages and currents in 2T2D cnfiguratin An electrnic card has been designed fr triggering the thyristrs at the desired mment. This cntrl includes, basically: A zer vltage detectr, a micrcntrller and a driver circuit fr thyristrs. D. 3T-3D Figure 10. 3T3D cnfiguratin 3T3D typlgy can reach the same maximum vltages as 4T cnfiguratin. 3T3D des nt permit a cntrl as gd as 6T r 4T mdules, because here there are three dides. 3T3D has n phase always cnnected as 2T2D, but its cntrl is mre cmplex. E. Chice f typlgy T make a prttype, all typlgies have been evaluated using the criterins described at the beginning f the paper. 4T typlgy reaches, in every pening state, the maximum vltage fr thyristrs (in this case 1338). 6T typlgy can achieve this vltage, but nt necessary in its every pening state. Adapting its pening sequence, is pssible t frce that the redistributin f vltages always results in less than maximum n thyristrs, this is, less than 1338. On the ther hand, 6T has tw thyristrs mre, and needs ne trigger circuit mre fr clsing the third branch (remember that 4T has nly tw branches f thyristrs). This structure will be mre expensive. Bth, 6T and 4T need apprpriate cntrl if making fast cmmutatins is desired. 2T2D has always ne phase cnnected t the net; this is the discharge resistrs are cnstantly wrking when the switch is pened. Having tw dides instead f tw thyristrs implies less cntrl and slws cmmutatins. 3T3D permits mre cntrl than 2T2D, but is expensive; having ne mdule mre. Mdules thyristr+thyristr and thyristr+dide have similar prices. The structure chsen is 4T, because is cheaper than 6T and is pssible t make an apprpriate cntrl t make fast cmmutatins (like 6T). In a structure with dides mdules is Figure 11. Triggering system The basic peratin f the cntrl is: The thyristrs are pened until there is an external clsing rder. When this rder is received, cntrl waits fr a zer-crss vltage. When ne f the zer vltage detectrs gives t the micrcntrller the signal, this triggers its crrespnding drive circuit with a pulse-trigger. Then, the driver circuit, based n pulse transfrmers, applies this pulse-trigger t the gate f thyristrs. There are tw driver circuits, ne fr each branch f thyristrs. Figure 12. 4T cnfiguratin S, the micrcntrller permits t clse each branch at the desired instant and, in cnsequence, clsing in a narrw zer crssing vltage.
Next graph shws the prttype wrking with a 50 kar. battery f capacitrs. In red is represented the vltage at thyristr terminals and in blue the current crssing the thyristr at the mment f the cnnectin. (At the zer-crss vltage) The scale f the graph is: On vertical axis shws current in 25A/divisin and vltage in 250 /divisin. The hrizntal axis shws time in 5ms/divisn. Figure 14. Fast cmmutatin S, this cntrl allws ging as fast as thyristrs structure permits, that is, in this net, 25Hz. I. CONCLUSIONS Using 4T structure as static switch fr the cnnectin f batteries f capacitrs implies: Figure 13. Thyristr zer-crssing switch The graph shws that digital cntrl allws clsing the switch at zer-crss vltage withut delay. If there is n delay, there will nt be any difference f vltage between capacitr and net at clsing mment. This prttype has capacitive charge; in terms f vltage and current it means that, when vltage is zer, current is maximum (gap f 90º). S, at the cmmutatin mment (and nly at cmmutatins), the cnnectin at zer-crss vltage implies an vercurrent peak. Next graph shws prttype wrking in fast cmmutatins (in this case 8 Hz). In blue is represented the current and in red the vltage. The scale f the graph is: On vertical axis shws current in 50A/divisin and vltage in 500 /divisin. The hrizntal axis shws time in 200ms/divisn. Due t the use f thyristrs instead f dides, the pssibility f cmmutatin in every cycle Its ecnmical viability fr using nly tw mdules f tw thyristrs and fr using nly tw driver circuits Discharge resistrs nly wrks until the capacitrs are discharged because, unlike dides mdules, there is n phase always cnnected Digital cntrl allws: An apprpriate zer-crss detectin and in cnsequence triggering at the desired mment Fast cmmutatins with an apprpriate sequence in pening-clsing peratins. REFERENCES [1] J.A. Edminister et al. Circuits Eléctrics Mc.Graw Hill [2] Ericssn et al. Fundamentals f Pwer Electrnics Kluwer Academic Publishers [3] Mhan et al. Pwer electrnics Jhn Wiley & Sns, Inc. [4] General Electric SCR manual GE Cmpany [5] M. Gaudry Rectificadres, tiristres y triacs Paraninf [6] Teccr Electrnics,Inc. Triggering and gate characteristics f thyristrs [7] Teccr Electrnics,Inc. Thyristrs Used as AC Static Switches and Relays Applicatin Nte AN1007, www.teccr.cm, 2002 [8] ON Semicnductr Thyristr Thery and Design Cnsideratins, www.nsemi.cm, 2005 [9] J.A. Aguilar Peña Gbiern de tiristres http://vlti.ujaen.es/jaguilar [10] Denis KOCH Manibra y prtección de las baterías de cndensadres de Media Tensión, Cuadern Técnic nº 189 Schneider Electric,2000 [11] Gerge Templetn RC Snubber Netwrks fr Thyristr Pwer Cntrl and Transient Supressin Applicatin Nte AN1048, Mtr