PRODUCT/PROCESS CHANGE NOTIFICATION PCN APG-ABD//77 Dated Feb VIPower M5 - Activation of " Wafer Fab Catania as Additional Location /
PCN APG-ABD//77 - Dated Feb Table. Change Implementation Schedule Forecasted implementation date for change Forecasted availability date of samples for customer Forecasted date for STMicroelectronics change Qualification Plan results availability Estimated date of changed product first shipment -Jul- -Feb- -Feb- -Jul- Table. Change Identification Product Identification (Product Family/Commercial Product) Type of change Reason for change Description of the change see list Waferfab additional location Service Improvement In order to improve Capacities and Service inches wafer Fab Catania has been qualified as additional location for VIPower M5 technology products. Change Product Identification Manufacturing Location(s) "V5" traceability code identify " wafer fab ]Catania Ctm ]Catania Ctm /
PCN APG-ABD//77 - Dated Feb DOCUMENT APPROVAL Name Liporace, Nicola Nicoloso, Riccardo Minerva, Francesco Function Marketing Manager Product Manager Q.A. Manager /
PROCESS/PRODUCT CHANGE NOTIFICATION VIPower M5: Activation of " Wafer Fab. Catania as Additional Location. WHAT In order to improve Capacities and Service inches wafer Fab Catania has been qualified as additional location for VIPower M5 technology products. WHO All the Customers using below list of products. Part Number VND5ASP E / VND5ASPTR E VND5ATR E VND5BSP E / VND5BSPTR E VND5BTR E VNH59A E / VNH59ATR E VND5EASP E / VND5EASPTR E VN5EAFH E / VN5EAFHTR E VN5EAHTR E VN5EMH E / VN5EMHTR E VN5ENAHTR E VN5RH E / VN5RHTR E Samples Availability wk wk9 wk wk available wk wk wk wk wk wk WHEN Change will be implemented according to the following schedule: -Qualification results enclosed to this PCN (RRCT5). -Samples availability: see upon table. -Tentative Implementation on July WHERE Catania (CT CTM) / Catania (CM5 CTM).
VIPower ML5 technology transfer from CTM Catania (Italy) to CTM Catania (Italy) General Informations Locations Commercial Product VND5EASP-E Diffusion fab location ST CTM Catania (Italy) Product Line VH Assembly plant location ST Muar (Malaysia) Silicon process technology VIPower M5 Test plant location ST Muar (Malaysia) Package PowerSO Reliability lab location ST Catania (Italy) General Informations Locations Commercial Product VND5B-E Diffusion fab location ST CTM Catania (Italy) Product Line VH Assembly plant location ASE (Korea) Silicon process technology VIPower M5 Test plant location ST Muar (Malaysia) Package PQFN Power x Reliability lab location ST Catania (Italy) Author: F.CERAULO Product Qualification Eng APG Q&R Catania Reliability and electrical test executed by: S.Di Stefano - M.Spitaleri Rel. Eng. APM Rel Dept. APG Support RRCT5 Date of issue: Dec the rd Page: of
Table of contents Section Pag Content Reliability evaluations overview. Objectives. Results Traceability Devices characteristics VND5ASP-E. Generalities. 7 Pins connection. 7 Blocks diagram. 7 Bonding diagram.5 Package outline / Mechanical data 9 Devices characteristics VND5B-E. 9 Generalities. Pins connection. Blocks diagram. Bonding diagram.5 Package outline / Mechanical data 5 Reliability qualification plan and results Summary table Electrical Drift Analysis RRCT5 Date of issue: Dec the rd Page: of
-. Reliability evaluations overview. Objectives Aim of this report is to present the results of the reliability evaluations performed on VND5EASP- E (VH as ST internal silicon line) and on VND5B-E (VH as ST internal silicon line) chosen as test vehicles in order to transfer the VIPower ML5 technology from ST CTM Catania (Italy) wafer fab to ST CTM Catania (Italy) wafer fab. These are multi chip Double High Side Driver products with analog current sense for Automotive Application. The VND5EASP-E is assembled by ST Muar (Malaysia) in PowerSO- package while the VND5B-E is assembled by ASE (Korea) subcontractor in QFPN x package. The reliability evaluation was based on three lots, two of them of VND5EASP-E and one of VND5B-E. According with the AEC_Q Rev.G specification for the Accelerated Environment Stress (test Group A) and the Accelerated Lifetime Simulation (test Group B) the following tests were performed for each lot: Preconditioning (PC), Temperature Humidity Bias (THB), Autoclave (AC), Thermal Cycling (TC), High Temperature Storage (HTS), Power Temperature Cycling (PTC), High Temperature Operative Life (HTOL). An ESD characterization (HBM, CDM), the Latch-UP (LU) and Gate Leakage (GL) control were also done as Electrical Verification (test Group E).. Results All reliability tests have been completed with positive results, neither functional nor parametric rejects were detected at final electrical testing. The drift analysis performed at T=+5 C examining I OFF@V, R ON@V, K _CK@V (for VND5EASP- E) and I OFF@V, R ON@V (for VND5B-E), showed a good stability for all the electrical monitored parameters. Based on the overall positive results we consider the products qualified from a reliability point of view. RRCT5 Date of issue: Dec the rd Page: of
-. Traceability VND5ASP-E Wafer fab manufacturing location Wafer diameter Silicon process technology Die finishing back side Die size Metal materials/levels Die finishing front side Wafer fab information ST CTM CATANIA (Italy) as signal part ST CTM CATANIA (Italy) as power die as signal part, as power die VIPower M5E signal part, VIPower ML5 power die VNS (signal) Raw silicon, VNS9 (power) Ti-Ni-Au VNS (signal) x9, VNS9 (power) 57x5 micron VNS (signal) Ti/TiN/Ti/AlSiCu / levels (. micron last level) VNS9 (power) Ti/TiN/TiAlCu/ level (.7 micron) SiN / Polyimide Diffusion Lots # Lot : VNS (signal) 5, VNS9 (power) 55 Lot : VNS (signal) 79, VNS9 (power) 55 Assembly plant location Package description Molding compound Wires bonding materials/diameters Assembly Information ST Muar (Malaysia) PowerSO_ FRAME PSO- riv -/5-fused SUMITOMO EME-G7LS Au.mils (on signal) / Al mils (on power) Die attach material PREFORM Pb/Ag/Sn 97.5/.5/ TAPE ADWILL LE-5PAS Assembly Lots # Lot: 999VS, Lot: 999VT Electrical testing manufacturing location Final Testing Information ST Muar (Malaysia) Reliability test execution location Reliability Information ST Catania (Italy) RRCT5 Date of issue: Dec the rd Page: of
VND5B-E Wafer fab information Wafer fab manufacturing location ST CTM CATANIA (Italy) as signal part ST CTM CATANIA (Italy) as power die Wafer diameter as signal part, as power die Silicon process technology VIPower M5E signal part, VIPower ML5 power die Die finishing back side VNS (signal) Ti-Ni-Au, VNI (power) Ti-Ni-Au Die size VNS (signal) x5, VNI (power) 799x micron Metal materials/levels VNS (signal) Ti/TiN/TiAlCu / levels (. micron last level) VNI (power) Ti/TiN/TiAlCu / level (.7 micron) Die finishing front side VNS (signal) SiN / Polyimide, VNI (power) Teos + PTeos + SiOn + PIX Diffusion Lots # VNS (signal), VNI (power) 557 Assembly Information Assembly plant location ASE (Korea) Package description PQFN Power x Molding compound Sumitomo G7 Wires bonding materials/diameters Au.mils (on signal) / Al mils (on power) Die attach material PREFORM Pb/Ag/Sn 95.5/.5/ D/A ADHESIVE ABLE 9 Assembly Lots # HACZA Electrical testing manufacturing location Final Testing Information ST Muar (Malaysia) Reliability test execution location Reliability Information ST Catania (Italy) RRCT5 Date of issue: Dec the rd Page: 5 of
-. VND5EASP-E - Devices characteristics. Generalities RRCT5 Date of issue: Dec the rd Page: of
. Pins connection. Blocks diagram. Bonding diagram RRCT5 Date of issue: Dec the rd Page: 7 of
.5 Package outline/mechanical data RRCT5 Date of issue: Dec the rd Page: of
-. VND5B-E - Devices characteristics. Generalities RRCT5 Date of issue: Dec the rd Page: 9 of
. Pins connection. Blocks diagram. Bonding diagram RRCT5 Date of issue: Dec the rd Page: of
.5 Package outline/mechanical data RRCT5 Date of issue: Dec the rd Page: of
- 5. Reliability qualification plan and results AEC # Test Name STM Test Conditions Sample Size/ Lots Results Fails/SS/Lots Comments A A A PC Pre Cond THB Temp Humidity Bias AC Autoclave Preconditioning at Jedec Level, store 9 hours at Ta=ºC, RH=%, reflow ( times) at 5ºC Ta=5ºC, RH=5%, V CC =5V for hours Ta=ºC, Pa=atm, RH=% for 9 hours Before THB, AC, TC Reliability executed on units soldered on PCB 77/ /77/ 77/ /77/ xvnd5easp xvnd5b xvnd5easp xvnd5b A A5 A B E E E E TC Temp. Cycling PTC Power Temp. Cycling HTSL High Temp. Storage Life HTOL High Temp. Op. Life Ta=-5ºC / +5ºC for 5 cycles 77/ /77/ Per JA5. Ta=-ºC / +5ºC for cycles. Test before and after at room and hot temperatures. Ta=5ºC for hours. TST before and after at room and hot temperatures. Bias Static stress (JESD-A): Ta=5ºC, V CC = 5V for hours ESD HBM 5/ 5/ /5/ 5/ /5/ 77/ /77/ V CC/Output: ±5.kV CS_DIS/Input: ±.kv CS: ±.kv xvnd5easp xvnd5b Only on VND5EASP-E xvnd5easp xvnd5b xvnd5easp xvnd5b Only on VND5EASP-E ESD HBM / All pins: ±.kv Only on VND5B-E ESD CDM / All pins: ±75V Both products LU Latch-Up / ±ma E GL Gate Leakage / Passed RRCT5 Date of issue: Dec the rd Page: of
-. Electrical drift analysis Assy Lot_999VS VND5EASP-E - Assy Lot _999VS TC- K_CH@V(k) VND5EASP-E - Assy Lot _999VS Autoclave - K_CH@V(k) TC cy TC cy TC 5cy Line h Line +% AC 9h Line h Line +% VND5EASP-E - Assy Lot _999VS HTOL- K_CH@V(k VND5EASP-E - Assy Lot _999VS THB - K_CH@V(k) HTOL h HTOL 5h Line h HTOL h Line +% THB h THB 5h Line h THB h Line +% VND5EASP-E - Assy Lot _999VS HTSL - K_CH@V(k) HTS h HTS 5h Line h HTSh Line +% RRCT5 Date of issue: Dec the rd Page: of
VND5EASP-E Assy Lot_999VS TC - Isoff@V(µA) - Lot VND5EASP-E Assy Lot_999VS HTOL - Isoff@V(µA) - Lot.5.5.5.5.5.5.5.5 TC cy TC cy TC 5cy Line h.5.5.5.5.5.5.5.5 HTOL h Line h HTOL 5h HTOL h.5.5.5.5 VND5EASP-E Assy Lot_999VS Autoclave - Isoff@V(µA) - Lot.5.5.5.5 AC 9h Line h.5.5.5.5 VND5EASP-E Assy Lot_999VS THB - Isoff@V(µA) - Lot.5.5.5.5 THB h THB h THB 5h Line h.5.5.5.5 VND5EASP-E Assy Lot_999VS HTSL - Isoff@V(mA) - Lot.5.5.5.5 HTS h HTS h HTS 5h Line h RRCT5 Date of issue: Dec the rd Page: of
VND5EASP-E - Assy Lot _999VS TC - Ron@V_CH(mΏ) VND5EASP-E - Assy Lot _999VS HTOL - Ron@V_CH(mΏ) 7 7 5 5 5 7 TC cy TC cy Line h Line +% TC 5cy 5 7 HTOL h HTOL 5h Line h Line +% HTOL h VND5EASP-E - Assy Lot _999VS Autoclave - Ron@V_CH(mΏ) VND5EASP-E - Assy Lot _999VS THB - Ron@V_CH(mΏ) 7 7 5 5 5 7 AC 9h Line h Line +% 5 7 THB h THB 5h Line h Line +% THB h VND5EASP-E - Assy Lot _999VS HTSL - Ron@V_CH(mΏ) 7 5 5 7 HTS h HTS 5h Line h Line +% HTS h RRCT5 Date of issue: Dec the rd Page: 5 of
Assy Lot_999VT VND5EASP-E - Assy Lot _999VT TC - K_CH@V(k) VND5EASP-E - Assy Lot _999VT Autoclave - K_CH@V(k) TC cy TC cy TC 5cy Line h Line +% AC 9h Line h Line +% VND5EASP-E - Assy Lot _999VT HTOL - K_CH@V(k) VND5EASP-E - Assy Lot _999VT THB - K_CH@V(k) HTOL h HTOL 5h Line h HTOL h Line +% THB h THB 5h Line h THB h Line +% VND5EASP-E - Assy Lot _999VT HTSL - K_CH@V(k) HTS h HTS 5h Line h HTSh Line +% RRCT5 Date of issue: Dec the rd Page: of
VND5EASP-E - Assy Lot _999VT TC - Isoff@V(µA) VND5EASP-E - Assy Lot _999VT HTOL - Isoff@V(µA).5.5.5.5.5.5.5.5.5.5.5.5 TC cy TC cy TC 5cy Line h.5.5.5.5 HTOL h Line h HTOL 5h HTOL h VND5EASP-E - Assy Lot _999VT Autoclave - Isoff@V(µA) - Lot VND5EASP-E - Assy Lot _999VT THB - Isoff@V(µA) - Lot.5.5.5.5.5.5.5.5.5.5.5.5 AC 9h Line h.5.5.5.5 THB h THB h THB 5h Line h.5.5.5.5 VND5EASP-E - Assy Lot _999VT HTSL - Isoff@V(mA) - Lot.5.5.5.5 HTS h HTS h HTS 5h Line h RRCT5 Date of issue: Dec the rd Page: 7 of
VND5EASP-E - Assy Lot _999VT TC - Ron@V_CH(mΏ) VND5EASP-E - Assy Lot _999VT HTOL - Ron@V_CH(mΏ) 7 7 5 5 5 7 TC cy TC cy Line h Line +% TC 5cy 5 7 HTOL h HTOL 5h Line h Line +% HTOL h VND5EASP-E - Assy Lot _999VT Autoclave - Ron@V_CH(mΏ) VND5EASP-E - Assy Lot _999VT THB - Ron@V_CH(mΏ) 7 7 5 5 5 7 AC 9h Line h Line +% 5 7 THB h THB 5h Line h Line +% THB h VND5EASP-E - Assy Lot _999VT HTSL - Ron@V_CH(mΏ) 7 5 5 7 HTS h HTS 5h Line h Line +% HTS h RRCT5 Date of issue: Dec the rd Page: of
Assy Lot_HACZA VND5B E_Assy Lot HACZA TC_ISOFF@V_(uA) cy VND5B E_Assy Lot HACZA HTOL_ISOFF@V_(uA) h cy 5cy Line h 5h h Line h Line +% Line +% VND5B E_Assy Lot HACZA HTSL_ISOFF@V_(uA) h VND5B E_Assy Lot HACZA THB_ISOFF@V_(uA) h 5h h Line h 5h h Line h Line +% Line +% VND5B E_Assy Lot HACZA AUTOCLAVE_ISOFF@V_(uA) 9h Line h Line+ % RRCT5 Date of issue: Dec the rd Page: 9 of
VND5B E_Assy Lot HACZA TC_RON@V_(mΩ) cy cy 5cy Line h Line +% VND5B E_Assy Lot HACZA HTOL_RON@V_(mΩ) h 5h h Line h Line +% VND5B E_Assy Lot HACZA HTSL_RON@V_(mΩ) h VND5B E_Assy Lot HACZA THB_RON@V_(mΩ) h 5h h Line h 5h h Line h Line +% Line +% VND5B E_Assy Lot HACZA AUTOCLAVE_RON@V_(mΩ) 9h Line h Line +% RRCT5 Date of issue: Dec the rd Page: of
Public Products List PCN Title : VIPower M5 - Activation of " Wafer Fab Catania as Additional Location PCN Reference : APG-ABD//77 PCN Created on : 5-FEB- Subject : Public Products List Dear Customer, Please find below the Standard Public Products List impacted by the change: ST COMMERCIAL PRODUCT VN5EAHTR-E VN5EMH-E VN5EMHTR-E VN5RH-E VN5RHTR-E VND5ASP-E VND5ASPTR-E VND5ATR-E VND5BSP-E VND5BSPTR-E VND5BTR-E VND5EASP-E VND5EASPTR-E VNH59A-E /
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