Low Inductance Capacitors

Transcription

1 ow Inductance Capacitors Introduction he signal integrity characteristics of a Power Delivery Network (PDN) are becoming critical aspects of board level and semiconductor package designs due to higher operating frequencies, larger power demands, and the ever shrinking lower and upper voltage limits around low operating voltages. hese power system challenges are coming from mainstream designs with operating frequencies of 300MHz or greater, modest ICs with power demand of 5 watts or more, and operating voltages below 3 volts. he classic PDN topology is comprised of a series of capacitor stages. Figure is an example of this architecture with multiple capacitor stages. An ideal capacitor can transfer all its stored energy to a load instantly. A real capacitor has parasitics that prevent instantaneous transfer of a capacitor s stored energy. he true nature of a capacitor can be modeled as an RC equivalent circuit. For most simulation purposes, it is possible to model the characteristics of a real capacitor with one capacitor, one resistor, and one inductor. he RC values in this model are commonly referred to as equivalent series capacitance (ESC), equivalent series resistance (ESR), and equivalent series inductance (ES). he ES of a capacitor determines the speed of energy transfer to a load. he lower the ES of a capacitor, the faster that energy can be transferred to a load. Historically, there has been a tradeoff between energy storage (capacitance) and inductance (speed of energy delivery). ow ES devices typically have low capacitance. ikewise, higher capacitance devices typically have higher ESs. his tradeoff between ES (speed of energy delivery) and capacitance (energy storage) drives the PDN design topology that places the fastest low ES capacitors as close to the load as possible. ow Inductance MCCs are found on semiconductor packages and on boards as close as possible to the load. Slowest Capacitors Fastest Capacitors Semiconductor Product VR Bulk Board-evel Package-evel Die-evel ow Inductance Decoupling Capacitors Figure Classic Power Delivery Network (PDN) Architecture OW INDUCANCE CHIP CAPACIORS he key physical characteristic determining equivalent series inductance (ES) of a capacitor is the size of the current loop it creates. he smaller the current loop, the lower the ES. A standard surface mount MCC is rectangular in shape with electrical terminations on its shorter sides. A ow Inductance Chip Capacitor (ICC) sometimes referred to as Reverse Geometry Capacitor (RGC) has its terminations on the longer side of its rectangular shape. When the distance between terminations is reduced, the size of the current loop is reduced. Since the size of the current loop is the primary driver of inductance, an 0306 with a smaller current loop has significantly lower ES then an he reduction in ES varies by EIA size, however, ES is typically reduced 60% or more with an ICC versus a standard MCC. INERDIGIAED CAPACIORS he size of a current loop has the greatest impact on the ES characteristics of a surface mount capacitor. here is a secondary method for decreasing the ES of a capacitor. his secondary method uses adjacent opposing current loops to reduce ES. he InterDigitated Capacitor (IDC) utilizes both primary and secondary methods of reducing inductance. he IDC architecture shrinks the distance between terminations to minimize the current loop size, then further reduces inductance by creating adjacent opposing current loops. An IDC is one single capacitor with an internal structure that has been optimized for low ES. Similar to standard MCC versus ICCs, the reduction in ES varies by EIA case size. ypically, for the same EIA size, an IDC delivers an ES that is at least 80% lower than an MCC. 59

2 ow Inductance Capacitors Introduction AND GRID ARRAY (GA) CAPACIORS and Grid Array (GA) capacitors are based on the first ow ES MCC technology created to specifically address the design needs of current day Power Delivery Networks (PDNs). his is the 3rd low inductance capacitor technology developed by AVX. GA technology provides engineers with new options. he GA internal structure and manufacturing technology eliminates the historic need for a device to be physically small to create small current loops to minimize inductance. he first family of GA products are terminal devices. A terminal 0306 GA delivers ES performance that is equal to or better than an terminal IDC. he terminal 0805 GA delivers ES performance that approaches the terminal IDC. New designs that would have used 8 terminal IDCs are moving to terminal GAs because the layout is easier for a terminal device and manufacturing yield is better for a terminal GA versus an 8 terminal IDC. GA technology is also used in a 4 terminal family of products that AVX is sampling and will formerly introduce in 008. Beyond 008, there are new multi-terminal GA product families that will provide even more attractive options for PDN designers. OW INDUCANCE CHIP ARRAYS (ICA ) he ICA product family is the result of a joint development effort between AVX and IBM to develop a high performance MCC family of decoupling capacitors. ICA was introduced in the 980s and remains the leading choice of designers in high performance semiconductor packages and high reliability board level decoupling applications. ICA products are used in % uptime semiconductor package applications on both ceramic and organic substrates. he C4 solder ball termination option is the perfect compliment to flip-chip packaging technology. Mainframe class CPUs, ultimate performance multi-chip modules, and communications systems that must have the reliability of 5 9 s use ICA. ICA products with either Sn/Pb or Pb-free solder balls are used for decoupling in high reliability military and aerospace applications. hese ICA devices are used for decoupling of large pin count FPGAs, ASICs, CPUs, and other high power ICs with low operating voltages. When high reliability decoupling applications require the very lowest ES capacitors, ICA products are the best option. 470 nf 0306 Impedance Comparison GA 0306 ICC IDC 0603 MCC Impedance (ohms) Frequency (MHz) Figure MCC, ICC, IDC, and GA technologies deliver different levels of equivalent series inductance (ES). 60

3 GA ow Inductance Capacitors 004/0306/0805 and Grid Arrays and Grid Array (GA) capacitors are the latest family of low inductance MCCs from AVX. hese new GA products are the third low inductance family developed by AVX. he innovative GA technology sets a new standard for low inductance MCC performance. Electronic Products awarded its 006 Product of the Year Award to the GA Decoupling capacitor. Our initial terminal versions of GA technology deliver the performance of an 8 terminal IDC low inductance MCC with a number of advantages including: Simplified layout of large solder pads compared to 8 small pads for IDCs Opportunity to reduce PCB or substrate contribution to system ES by using multiple parallel vias in solder pads Advanced FC manufacturing process used to create uniformly flat terminations on the capacitor that resist tombstoning Better solder joint reliability APPICAIONS Semiconductor Packages Microprocessors/CPUs Graphics Processors/GPUs Chipsets FPGAs ASICs Board evel Device Decoupling Frequencies of 300 MHz or more ICs drawing 5W or more ow voltages High speed buses 0306 ERMINA GA COMPARISON WIH ERMINA IDC Impedance (Ω) Frequency (MHz) 69

4 GA ow Inductance Capacitors 004/0306/0805 and Grid Arrays SIZE G (004) G (0306) GC (0805) ength mm (in.) 0.50 (0.00) 0.76 (0.030).06 (0.08) Width mm (in.).00 (0.039).60 (0.063).3 (0.05) emp. Char. X5R (D) X7S (Z) X6S (W) X7R (C) X5R (D) X7S (Z) X6S (W) X7R (C) X5R (D) X7S (Z) X6S (W) Working Voltage (6) (4) (6) (4) (6) (4) (Z) (6) (4) (6) (4) (6) (4) (6) (4) (6) (4) (6) (4) (6) (4) (6) (4) Cap (µf) 0.00 (03) 0.0 (3) (473) 0.00 (04) 0.0 (4) (334) (474).000 (05).00 (5) = X7R = X5R = X7S = X6S HOW O ORDER G 6 Z 04 M A S Style Case Size = 004 = 0306 C = 0805 Number of erminals Working Voltage 4 = 4V 6 = 6.3V Z = 0V emperature Characteristic C = X7R D = X5R Z = X7S W = X6S Coded Cap Cap olerance M = 0% ermination Style A = U and ermination 00% Sn* *Contact factory for other termination finishes Packaging ape & Reel = 7" Reel 4 = 3" Reel hickness S = 0.55mm max Number of Capacitors Reverse Geometry GA G, G Standard Geometry GA GC op View op View Side BW W Side Side BW W Side PAR DIMENSIONS mm (inches) Series W BW G (004) 0.5 ± ± ± ± ± 0.08 (0.00±0.00) (0.039 ± 0.004) (0.00 ± 0.00) (0.03 ± 0.004) (0.005 ± 0.003) G (0306) 0.76 ± ± ± ± ± 0.08 (0.030 ± 0.004) (0.063 ± 0.004) (0.00 ± 0.00) (0.059 ± 0.004) (0.0 ± 0.003) GC (0805).06 ± ± ± ± ±0.08 (0.08 ± 0.004) (0.05 ± 0.004) (0.00 ± 0.00) (0.045 ± 0.004) (0.035 ± 0.003) RECOMMENDED SODER PAD DIMENSIONS mm (inches) P G PW Series P PW G G (004) 0.50 (0.00).00 (0.039) 0.0 (0.008) G (0306) 0.65 (0.06).50 (0.059) 0.0 (0.008) GC (0805).5 (0.049).40 (0.055) 0.0 (0.008) EAD-FREE COMPAIE COMPONEN 77

5 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & ifecycle Information: AVX: G6Z03MAS\4K G6Z473MAS G6Z3MAS GC4D5MAS GC6D05MAS G4Z474MAS G6C03MAS G4Z334MAS G6Z04MAS G6D04MAS G6C04MAS G4Z4MAS G6D4MAS G6Z04MAS G6Z03MAS G6D04MAS G6D474MAS