NT1777A 1 COCOP 2.2KΩ 2 V-VMP 3 CSDOP 4 DOVINI NTC 10KΩ uF VTH 39KΩ RSENSE P-

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1 ///-Cell Lithium-lon/Polymer Protector Features High accuracy circuit : mv : 0mV over-current- : 0% over-current- : 0% Load short-circuiting : 0% Charge over-current : mv/ 0mV Temperature : High withstand Absolute maximum rating: 0V Operating range:.v to V Low power consumption Supply current:.ua max. (Ta=+ ) Delay times of over-charge, load short-circuiting, charge over-current and over/under are generated by an internal circuit (fixed). Delay times of over-discharge, discharge over-current- and - are controlled by external capacitors. Built-in breaking wire detector function : pin TSSOP Lead-free, Sn 00%, Halogen-free Description The NT series are the ///-cell protection IC with protection for lithium-ion/lithium-polymer/lithium-iron phosphate rechargeable battery pack. The high accuracy, current detector and circuits are built in NT series with state-of-the-art design and process. The NT series have three types of discharge over-current protection and one type of charge over-current protection. The NT series have three types of over during charging, over- during discharging and under- during charging protection. Applications Lithium-ion rechargeable battery pack Lithium-polymer rechargeable battery pack Lithium-iron phosphate rechargeable battery pack Typical Application Circuit P+.MΩ.MΩ 00Ω.KΩ 0.00uF NTC 0KΩ 9KΩ.KΩ 0.uF 0.00uF COCOP V-VMP CSDOP DOVINI VRTH CDT CT CCT CT VSS VTH NC VDD VDD VC V VC V VC V VC V CTL SEL SEL SEL 0 0 NC VSS 9 9 KΩ KΩ 00Ω.uF KΩ 0.uF KΩ 0.uF KΩ 0.uF KΩ 0.uF BAT BAT BAT BAT BAT CHG- Q Q RSENSE P- These devices have limited build-in ESD protection. The leads must be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Neotec Semiconductor Ltd., / DS V.00

2 and Pin Configurations TSSOP-L Top view 0 9 Pin No. Symbol Pin description CO V- CS DO FET gate control pin for charging path (Pch open-drain output). Normal mode : High mode : Hi-impedance Input terminal connected to charger negative. over-current and load short-circuiting detector. Input of overcurrent. Detected overcurrent by sense resistor between CS pin and VSS pin. Detected charger and load connection. FET gate control pin for discharging path (CMOS output) Normal mode : High mode : Low VRTH Voltage regulator output pin CT Capacitor connection for over-discharge. CT Capacitor connection for discharge over-current- and -. VTH Temperature terminal. 9 VSS Cell V negative input pin. The input terminal of the ground of IC. 0 SEL SEL For,, or -cell in series. SEL pin SEL pin Application VDD VDD cells application VDD VSS cells application (Connect V=VDD) VSS VDD cells application (Connect V=VDD, V=VSS) VSS VSS cells application (Connect V=VDD, V=V=VSS) V Cell V positive and cell V negative input pin V Cell V positive and cell V negative input pin V Cell V positive and cell V negative input pin V Cell V positive and cell V negative input pin VDD Power supply input pin and cell V positive Neotec Semiconductor Ltd., / DS V.00

3 Block Diagram SEL SEL 0 VDD V control and delay circuit CO MUX V control and delay circuit Regulator DO V V- over-current- V over-current- Over for discharging current VSS 9 Load short-circuit Over for charging current Under- for charging current VTH Charge over-current Regulator VRTH CS CT CT Neotec Semiconductor Ltd., / DS V.00

4 Ordering Information -XXX XX Q: TSSOP-L version code: Table : Detection threshold level Overcharge V DET Overcharge V REL Overdischarge V DET Overdischarge V REL overcurrent- V DET overcurrent- V DET Charge overcurrent V DET Load shortcircuiting V SHORT TDA Q FKA Q FWA Q FQA Q Remark: Please contact our sales for the products with value other than those specified above. Table : Temperature threshold over TH over RELTH Charge over TH Charge over RELTH Charge under TH Charge under RELTH TDA Q FKA Q FWA Q FQA Q Neotec Semiconductor Ltd., / DS V.00

5 Table : Function condition condition 0 V battery charge function Built-in breaking wire detector function Delay time (Table ) TDA Q Available Yes () (a) Voltage (a) Voltage FKA Q or Available Yes () or FWA Q (b) current (b) Charge current Available Yes () FQA Q Available Yes () Remark: For the details, please refer to the description of Operations Table : Delay time Delay time t VDET (s) t VDET (s) (at C CT=0.uF) over-current- t VDET (ms) (at C CT=0.00uF) over-current- t VDET (ms) (at C CT=0.00uF) Load short-circuiting t SHORT (us) Charge over-current t VDET (ms) Temperature t VTH (s) () ±0% ±0% 0 ±0% 0 ±0% 0 +0/-0% 00 ±0% +00%/-0% Neotec Semiconductor Ltd., / DS V.00