400GAUI-8 C2M TP1a Eye Measurement Data
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1 400GAUI-8 C2M TP1a Eye Measurement Data Jane Lim, Cisco Pirooz Tooyserkani, Cisco 09/09/2017 IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 1
2 Wei Yao Liehui Ren Matt Traverso Marco Mazzini Upen Reddy Kareti IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 2
3 Investigate if current 400GAUI-8 C2M TP1a eye spec can be met over 10dB channel Check the impact of QSFPDD connector to the eye quality, 3 cases were studied: Case 1: 2x1 stacked Upper port Case 2: 2x1 stacked Lower port Case 3: 1x1 SMT Different host Transmitters were used for data comparison Same TP1a setup was used in all measurements Only QSFPDD legacy pair was measured, as the QSFPDD HCB with new pairs can t meet IL spec IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 3
4 The electrical characteristics for 400GAUI-8 C2M interface is defined at TP1a for the host Host compliance board (HCB) is used to verify the host electrical signal at TP1a. IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 4
5 Host PCB board with traces and QSFPDD connector mated with HCB 802.3bs recommended channel IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 5
6 The host output eye is measured using reference receiver with a CTLE defined in 120E EH & EW measurement followed methodology defined in 120E.4.2 Host TX equalization is optimized to meet eye requirements The peaking values from Table 120E-2 are selected based on maximum EW & EH Measurement is performed at room temp with typical Si & nominal voltage on all power supplies IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 6
7 Serdes List Channel End to end GHz (db) ESMW (mui) Eye height (mv) Optimal CTLE Gain (db) Serdes A Case 1: Host PCB + QDD Upper + HCB Serdes A Case 2: Host PCB + QDD Lower + HCB Serdes A Case 3: Host PCB + QDD SMT + HCB Serdes B Case 1: Host PCB + QDD Upper + HCB Serdes B Case 2: Host PCB + QDD Lower + HCB Serdes B Case 3: Host PCB + QDD SMT + HCB Serdes C Case 1: Host PCB + QDD Upper+HCB Serdes C Case 2: Host PCB + QDD Lower+HCB Serdes C Case 3: Host PCB + QDD SMT+HCB Results shown all 3 Serdes have low margin (<20%) meeting EW and/or EH specs: EW (min) = 0.22 mui; EH (min) = 32 mv Measured values project that the worst PVT corner may violate the spec IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 7
8 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 8
9 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 9
10 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 10
11 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 11
12 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 12
13 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 13
14 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 14
15 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 15
16 Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. CTLE (db) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 16
17 Ref: Comment # r03-12 by Yasuo Hidaka from Fujitsu, 4 options were investigated Serdes A with case 1 used in this experiment Baseline Option 1 Option 2 Option 3 Option 4 Reference CTLE TX FIR Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. Peaking DC Gain P1 freq Z1 freq P2 freq Z2 freq P3 freq Pre Main Post ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) Best results EW +5% better IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 17
18 Ref: Comment # r03-12 by Yasuo Hidaka from Fujitsu, 4 options were investigated Serdes B with case 1 used in this experiment Baseline Option 1 Option 2 Option 3 Option 4 Reference CTLE TX FIR Eye 0/1 Eye 1/2 Eye 2/3 Overall Min. Peaking DC Gain P1 freq Z1 freq P2 freq Z2 freq P3 freq Pre Main Post ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) ESMW (mui) EH (mv) Best results EW +10% better IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 18
19 It is challenging to meet current 400GAUI-8 TP1a eye specs even at typ. PVT ESMW & EH suffer lower margin (< 20%) 100G CAUI-4 has much better eye margin (> 50%) Measurements were done using legacy HCB QSFPDD HCB with new pairs could further reduce the margin Upper & lower eyes have worse EW than the middle eye due to the CTLE imposed BW limitation Adjusting reference CTLE bandwidth can improve ESMW up to ~10% with Option 2, 3, 4 Option 3 seems to be the best compromise with the least change to CTLE pole freq IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 19
20 Improve robustness of module receiver input from host to meet 1E-5 BER module VSR receiver adds the capability to adjust the sampling point of each PAM4 eyes Host VSR transmitter adds the capability to adjust the inner eye levels with same level separation mismatch ratio RLM(min) of 0.95 as per C2C specs of Table 120D 1 Modify reference CTLE pole value to better resemble the actual module receiver behavior The data shown PAM4 signaling is very sensitive to channel variation continuously adaptive CTLE is a must! Future work: Measure channels at different voltage and temperature corners Characterization with QSFPDD new pairs when the HCB is available IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 20
21 IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 21
22 Same TP1a channel setup Use 28nm 25G NRZ host serdes CTLE EW (ps) EW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 22
23 Same TP1a channel setup Use 16nm 56G PAM4 host serdes configured in 25G NRZ mode CTLE EW (ps) EW (mui) EH (mv) IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 23
24 IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 24
25 IEEE P802.3bs 200 Gb/s and 400 Gb/s Ethernet Task Force. 25
26 Thank You! IEEE P802.3bs 200Gb/s and 400 Gb/s Ethernet Task Force. 26
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