Lecture Notes. Snubber Circuits. William P. Robbins Dept. of Electrical and Computer Engineering University of Minnesota. Outline

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1 Lecture Notes Snubber Circuits William P. Robbins Dept. of Electrical and Computer Engineering University of Minnesota Outline A. Overview of Snubber Circuits B. Diode Snubbers C. Turnoff Snubbers D. Overvoltage Snubbers E. F. Turnon Snubbers Thyristor Snubbers Snubbers 1 1

2 Overview of Snubber Circuits for HardSwitched Converters Function: Protect semiconductor devices by: Limiting device voltages during turnoff transients Limiting device currents during turnon transients Types of Snubber Circuits 1. Unpolarized series Rnubbers Used to protect diodes and thyristors Limiting the rateofrise (di/dt) of currents through the semiconductor device at device turnon Limiting the rateofrise (dv/dt) of voltages across the semiconductor device at device turnoff. Polarized Rnubbers Used as turnoff snubbers to shape the turnon switching trajectory of controlled switches. Used as overvoltage snubbers to clamp voltages applied to controlled switches to safe values. Limit dv/dt during device turnoff Shaping the switching trajectory of the device as it turns on/off 3. Polarized Lnubbers Used as turnon snubbers to shape the turnoff switching trajectory of controlled switches. Limit di/dt during device turnon Snubbers

3 Need for Diode Snubber Circuit D f i Df (t) di Df d t I rr t S w L σ stray inductance v Df (t) t S w closes at t 0 snubber circuit Diode voltage without snubber di d t Diode breakdown if di Lσ dt > BV BD Snubbers 3

4 Equivalent Circuits for Diode Snubber Diode snapoff cathode anode Simplified snubber the capacitive snubber v Cs Cs i Df t Worst case assumptiondiode snaps off instantaneously at end of diode recovery R 0 s v v Cs Df Governing equation d v Cs dt v Cs Boundary conditions v Cs (0 ) 0 and i Lσ (0 ) I rr Snubbers 4

5 Performance of Capacitive Snubber v Cs (t) cos(ω o t) C base sin(ω o t) ω o 1 ; C base I rr C V s d C base V cs,max V Cs,max Vd C base 5 Snubbers 5

6 Effect of Adding Snubber Resistance Snubber Equivalent Circuit i(t) Governing equation d i dt di dt i 0 v (t) Df Cs Boundary conditions i(0 ) I rr and di(0 ) dt I rr Diode voltage as a function of time f (t) 1 e αt η cos(φ) sin(ω a t φ ζ) ; R b ω a ω o 1 (α/ ω o ) ; α η ; ω o 1 ; φ tan 1 (x) η 4 ηx [I rr ] C ; x b R ; R b b I ; C rr b V ; ζ tan1 (α/ω a ) d Snubbers 6

7 Performance of RC Snubber 3 At t t m v Df (t) V max t m tan 1 (ω a /α) ω a φ ξ ω a 0 C s C base,opt R base 1.3 V max 1 1 η 1 x exp(αt m ) V max V d η C base C base and x L s I rr R base and R base 1 I rr 0 R I s rr 0 1 R base Snubbers 7

8 Diode Snubber Design Nomogram 3 Wtot L s I rr / W R L s I rr / 0 0 V 0 max for R R 0 V s s,opt d ,op R base / C base 3 8 Snubbers 8

9 Need for Snubbers with Controlled Switches Stepdown converter Switch current and voltage waveforms di dt L 1 L i sw I rr i sw di dt S v sw L w 3 v sw t o t 1 t 3 t 4 t 5 t 6 L 1, L, L stray inductances 3 Lσ L 1 L L 3 i sw t 6 Switching trajectory of switch t 5 idealized switching loci t o t 1 turnoff Overvoltage at turnoff due to stray inductance turnon Overcurrent at turnon due to diode reverse recovery t 4 t 3 v sw Snubbers 9

10 Turnoff Snubber for Controlled Switches i DF D f Turnoff snubber D s Stepdown converter with turnoff snubber S w i D f Equivalent circuit during switch turn off. Simplifying assumptions 1. No stray inductance. i sw. i sw (t) (1 t/t fi ) i sw 3. i sw (t) uneffected by snubber circuit. Snubbers 10

11 Turnoff Snubber Operation Capacitor voltage and current for 0 < t < t fi i Cs (t) t t fi and v (t) Cs I o t C t s fi For 1, v Cs at t t fi yielding 1 t fi Circuit waveforms for varying values of i sw i sw i sw i Df i Df i Df t fi t fi t fi i v Cs < Cs1 Cs1 > C s Snubbers 11

12 Benefits of Snubber Resistance at Switch Turnon v sw D f t rr D s shorts out during S w turnoff. i D f I rr S w D s During S w turnon, D s reversebiased and discharges thru. i sw I rr Turnon with > 0 t rr discharge of Energy stored on dissipated in rather than in S w. v sw Turnon with 0 Energy stored on dissipated in S w. Voltage fall time kept quite short. i sw 0 t ri t t ri t rr Extra energy dissipation in S w because of lengthened voltage fall time. Snubbers 1

13 Effect of Turnoff Snubber Capacitance W / total Wbase W / W R base W T / Wbase / 1 Energy dissipation W R dissipation in resistor W T dissipation in switch S w t fi 1 W total W R W T i sw W base 0.5 t fi Cs < Cs1 RBSOA Switching trajectory Cs Cs1 Cs > Cs1 v sw Snubbers 13

14 Turnoff Snubber Design Procedure Selection of Minimize energy dissipation (W T ) in BJT at turnon Minimize W R W T Keep switching locus within RBSOA Reasonable value is 1 Snubber recovery time (BJT in onstate) Capacitor voltage exp(t/ ) Time for v Cs to drop to 0.1 is.3 Selection of BJT must remain on for a time of.3 Limit i cap (0 ) < I rr Usually designer specifies I rr < 0. so 0. Snubbers 14

15 Overvoltage Snubber D f R ov i s w k S w D ov C ov v s w Stepdown converter with overvoltage snubber comprised of D ov, C ov, and R ov. Switch S w waveforms without overvoltage snubber o t fi Overvoltage snubber limits overvoltage (due to stray Inductance) across Sw as it turns off. t fi switch current fall time ; k overvoltage on S w k di Lσ dt t fi k t fi Snubbers 15

16 Operation of Overvoltage Snubber i Lσ π D ov on for 0 < t < C ov D ov R ov t fi << π C ov C ov v Cov D ov,c ov provide alternate path for inductor current as S w turns off. Switch current can fall to zero much faster than L s current. D f forced to be on (approximating a short ckt) by after S w is off. Snubbers 16

17 Overvoltage Snubber Design Limit v sw,max to 0.1 L ο C ov k t fi Using L in above equation yields k t fi I o 100k t fi C ov (0.1 ) C ov 00 k 1 where 1 in turnoff snubber t fi which is used Choose R ov so that the transient recovery of C ov is critically damped so that ringing is minimized. For a critically damped circuit Q 1 R ov 0.1 ω o R ov 1 C ov R. ov Check that the recovery time of C ov (.3L /R ov ) than offtime duration, t off, of the switch Sw. is less With choice of R ov from above, t recovery is t recovery 3 k t fi Snubbers 17

18 Turnon Snubber D f L s S w R Ls D Ls D f Snubber circuit L s D f R Ls D Ls S w Stepdown converter with turnon snubber Snubber reduces V sw at switch turnon due drop across inductor L s. Will limit rateofrise of switch current if L s is sufficiently large. i sw With snubber Without snubber Switching trajectory with and without turnon snubber. L s di sw dt v sw Snubbers 18

19 Turnon Snubber Operating Waveforms Small values of snubber inductance (L s < L s1 ) v s w I rr di sw controlled by switch S dt w and drive circuit. Δv sw L s t ri i s w t ri t rr di sw dt Large values of snubber inductance (L s > L s1 ) limited by circuit to L s < t ri v s w I rr reduced L s1 t ri i s w I rr reduced when L s > L s1 because I rr proportional to di sw dt L s t > t on ri rr Snubbers 19

20 Turnon Snubber Recovery at Switch Turnoff D f R Ls exp(r Ls t/l s ) R Ls L s R Ls D Ls v s w i s w t rv V d S w Switch waveforms at turnoff with turnon snubber in circuit. Assume switch current fall time t ri 0. Inductor current must discharge thru D Ls R Ls series segment. Overvoltage smaller if t fi smaller. Time of.3 L s /R Ls required for inductor current to decay to 0.1 Offtime of switch must be >.3 L s /R Ls Snubbers 0

21 Turnon Snubber Design Tradeoffs Selection of inductor Larger L s decreases energy dissipation in switch at turnon W sw W B (1 I rr / ) [1 L s /L s1 ] W B t fi / and L s1 t fi / L s > L s1 W sw 0 Larger L s increases energy dissipation in R Ls W R W B L s / L s1 L s > L s1 reduces magnitude of reverse recovery current I rr Inductor must carry current when switch is on makes inductor expensive and hence turnon snubber seldom used Selection of resistor R Ls Smaller values of R Ls reduce switch overvoltage R Ls at turnoff Limiting overvoltage to 0.1 yields R Ls 0.1 / Larger values of R Ls shortens minimum switch offtime of.3 L s /R Ls Snubbers 1

22 Thyristor Snubber Circuit P v an 3phase thyristor circuit with snubbers v an (t) V s sin(ωt), v bn (t) V s sin(ωt 10 ), v cn (t) V s sin(ωt 40 ) v bn v cn A B C i d 4 6 Phasetoneutral waveforms v LL (t) 3 V s sin(ωt 60 ) v an α v bn Maximum rms linetoline voltage V LL 3 V s v LL v bn v an v ba ω t 1 Snubbers

23 Equivalent Circuit for SCR Snubber Calculations Assumptions Trigger angle α 90 so that v LL (t) maximum V LL Reverse recovery time t rr << period of ac waveform so that Equivalent circuit after T1 reverse recovery v LL (t) equals a constant value of v ba (ωt 1 ) V LL i Worst case stray inductance gives rise to reactance equal to or less than 5% of line impedance. V s I a1 V LL 6I a1 V LL Line impedance 3I a1 where I a1 rms value of fundamental component of the line current. ω 0.05 V LL 3I a1 T 1 after recovery V ( ω t ) ba 1 T (on) 3 P i T1 A Snubbers 3

24 Component Values for Thyristor Snubber Use same design as for diode snubber but adapt the formulas to the thyristor circuit notation Snubber capacitor C base I rr V d From snubber equivalent circuit di Lσ dt V LL I rr di Lσ dt t rr V LL t rr V LL 0.05 V LL 3 I a1 ω t rr 5 ωi a1 t rr V LL C base 0.05 V LL 5 ωi a1 t rr 3 I a1 ω V LL 8.7 ωi a1 t rr V LL Snubber resistance 1.3 R base 1.3 I rr 1.3 V LL 5ωI a1 t rr 0.07 V LL ωi a1 t rr Energy dissipated per cycle in snubber resistance W R W R I rr 18 ω I a1 V LL (t rr ) Snubbers 4

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